From: Cyril Bur <cyrilbur@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: wei.guo.simon@gmail.com, mikey@neuling.org
Subject: [PATCH v4 20/20] powerpc: Remove do_load_up_transact_{fpu,altivec}
Date: Tue, 6 Sep 2016 09:44:48 +1000 [thread overview]
Message-ID: <20160905234448.5866-21-cyrilbur@gmail.com> (raw)
In-Reply-To: <20160905234448.5866-1-cyrilbur@gmail.com>
Previous rework of TM code leaves these functions unused
Signed-off-by: Cyril Bur <cyrilbur@gmail.com>
---
arch/powerpc/include/asm/tm.h | 5 -----
arch/powerpc/kernel/fpu.S | 26 --------------------------
arch/powerpc/kernel/vector.S | 25 -------------------------
3 files changed, 56 deletions(-)
diff --git a/arch/powerpc/include/asm/tm.h b/arch/powerpc/include/asm/tm.h
index c22d704..82e06ca 100644
--- a/arch/powerpc/include/asm/tm.h
+++ b/arch/powerpc/include/asm/tm.h
@@ -9,11 +9,6 @@
#ifndef __ASSEMBLY__
-#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
-extern void do_load_up_transact_fpu(struct thread_struct *thread);
-extern void do_load_up_transact_altivec(struct thread_struct *thread);
-#endif
-
extern void tm_enable(void);
extern void tm_reclaim(struct thread_struct *thread,
unsigned long orig_msr, uint8_t cause);
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index 181c187..08d14b0 100644
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -50,32 +50,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
#define REST_32FPVSRS(n,c,base) __REST_32FPVSRS(n,__REG_##c,__REG_##base)
#define SAVE_32FPVSRS(n,c,base) __SAVE_32FPVSRS(n,__REG_##c,__REG_##base)
-#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
-/* void do_load_up_transact_fpu(struct thread_struct *thread)
- *
- * This is similar to load_up_fpu but for the transactional version of the FP
- * register set. It doesn't mess with the task MSR or valid flags.
- * Furthermore, we don't do lazy FP with TM currently.
- */
-_GLOBAL(do_load_up_transact_fpu)
- mfmsr r6
- ori r5,r6,MSR_FP
-#ifdef CONFIG_VSX
-BEGIN_FTR_SECTION
- oris r5,r5,MSR_VSX@h
-END_FTR_SECTION_IFSET(CPU_FTR_VSX)
-#endif
- SYNC
- MTMSRD(r5)
-
- addi r7,r3,THREAD_CKFPSTATE
- lfd fr0,FPSTATE_FPSCR(r7)
- MTFSF_L(fr0)
- REST_32FPVSRS(0, R4, R7)
-
- blr
-#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
-
/*
* Load state from memory into FP registers including FPSCR.
* Assumes the caller has enabled FP in the MSR.
diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S
index 7dc4021..bc85bdf 100644
--- a/arch/powerpc/kernel/vector.S
+++ b/arch/powerpc/kernel/vector.S
@@ -7,31 +7,6 @@
#include <asm/page.h>
#include <asm/ptrace.h>
-#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
-/* void do_load_up_transact_altivec(struct thread_struct *thread)
- *
- * This is similar to load_up_altivec but for the transactional version of the
- * vector regs. It doesn't mess with the task MSR or valid flags.
- * Furthermore, VEC laziness is not supported with TM currently.
- */
-_GLOBAL(do_load_up_transact_altivec)
- mfmsr r6
- oris r5,r6,MSR_VEC@h
- MTMSRD(r5)
- isync
-
- li r4,1
- stw r4,THREAD_USED_VR(r3)
-
- li r10,THREAD_CKVRSTATE+VRSTATE_VSCR
- lvx v0,r10,r3
- mtvscr v0
- addi r10,r3,THREAD_CKVRSTATE
- REST_32VRS(0,r4,r10)
-
- blr
-#endif
-
/*
* Load state from memory into VMX registers including VSCR.
* Assumes the caller has enabled VMX in the MSR.
--
2.9.3
prev parent reply other threads:[~2016-09-05 23:45 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-05 23:44 [PATCH v4 00/20] Consistent TM structures Cyril Bur
2016-09-05 23:44 ` [PATCH v4 01/20] selftests/powerpc: Compile selftests against headers without AT_HWCAP2 Cyril Bur
2016-09-05 23:44 ` [PATCH v4 02/20] powerpc: Always restore FPU/VEC/VSX if hardware transactional memory in use Cyril Bur
2016-09-05 23:44 ` [PATCH v4 03/20] powerpc: Add check_if_tm_restore_required() to giveup_all() Cyril Bur
2016-09-05 23:44 ` [PATCH v4 04/20] powerpc: Return the new MSR from msr_check_and_set() Cyril Bur
2016-09-05 23:44 ` [PATCH v4 05/20] powerpc: Never giveup a reclaimed thread when enabling kernel {fp, altivec, vsx} Cyril Bur
2016-09-05 23:44 ` [PATCH v4 06/20] powerpc: signals: Stop using current in signal code Cyril Bur
2016-09-05 23:44 ` [PATCH v4 07/20] selftests/powerpc: Check for VSX preservation across userspace preemption Cyril Bur
2016-09-05 23:44 ` [PATCH v4 08/20] selftests/powerpc: Rework FPU stack placement macros and move to header file Cyril Bur
2016-09-05 23:44 ` [PATCH v4 09/20] selftests/powerpc: Move VMX stack frame macros " Cyril Bur
2016-09-05 23:44 ` [PATCH v4 10/20] selftests/powerpc: Introduce GPR asm helper " Cyril Bur
2016-09-05 23:44 ` [PATCH v4 11/20] selftests/powerpc: Allow tests to extend their kill timeout Cyril Bur
2016-09-05 23:44 ` [PATCH v4 12/20] selftests/powerpc: Add TM tcheck helpers in C Cyril Bur
2016-09-05 23:44 ` [PATCH v4 13/20] selftests/powerpc: Check that signals always get delivered Cyril Bur
2016-09-05 23:44 ` [PATCH v4 14/20] selftests/powerpc: Add checks for transactional GPRs in signal contexts Cyril Bur
2016-09-05 23:44 ` [PATCH v4 15/20] selftests/powerpc: Add checks for transactional FPUs " Cyril Bur
2016-09-05 23:44 ` [PATCH v4 16/20] selftests/powerpc: Add checks for transactional VMXs " Cyril Bur
2016-09-05 23:44 ` [PATCH v4 17/20] selftests/powerpc: Add checks for transactional VSXs " Cyril Bur
2016-09-05 23:44 ` [PATCH v4 18/20] powerpc: tm: Always use fp_state and vr_state to store live registers Cyril Bur
2016-09-05 23:44 ` [PATCH v4 19/20] powerpc: tm: Rename transct_(*) to ck(\1)_state Cyril Bur
2016-09-05 23:44 ` Cyril Bur [this message]
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