From: Michael Neuling <mikey@neuling.org>
To: mpe@ellerman.id.au
Cc: benh@kernel.crashing.org, aneesh.kumar@linux.vnet.ibm.com,
linuxppc-dev@lists.ozlabs.org, mikey@neuling.org
Subject: [PATCH] powerpc/mm/radix: Invalidate ERAT on tlbiel for POWER9 DD1
Date: Wed, 16 Nov 2016 15:18:20 +1100 [thread overview]
Message-ID: <20161116041820.28433-1-mikey@neuling.org> (raw)
On POWER9 DD1, when we do a local TLB invalidate we also need to explicitly
invalidate the ERAT.
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/mm/tlb-radix.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
index bda8c43be7..4b087fc3c7 100644
--- a/arch/powerpc/mm/tlb-radix.c
+++ b/arch/powerpc/mm/tlb-radix.c
@@ -50,6 +50,10 @@ static inline void _tlbiel_pid(unsigned long pid, unsigned long ric)
for (set = 0; set < POWER9_TLB_SETS_RADIX ; set++) {
__tlbiel_pid(pid, set, ric);
}
+ if (cpu_has_feature(CPU_FTR_POWER9_DD1))
+ asm volatile("isync \n"
+ PPC_SLBIA(0x7)
+ : : :"memory");
return;
}
@@ -83,6 +87,10 @@ static inline void _tlbiel_va(unsigned long va, unsigned long pid,
asm volatile(PPC_TLBIEL(%0, %4, %3, %2, %1)
: : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory");
asm volatile("ptesync": : :"memory");
+ if (cpu_has_feature(CPU_FTR_POWER9_DD1))
+ asm volatile("isync \n"
+ PPC_SLBIA(0x7)
+ : : :"memory");
}
static inline void _tlbie_va(unsigned long va, unsigned long pid,
--
2.9.3
next reply other threads:[~2016-11-16 4:18 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-16 4:18 Michael Neuling [this message]
2016-11-16 4:35 ` [PATCH] powerpc/mm/radix: Invalidate ERAT on tlbiel for POWER9 DD1 Benjamin Herrenschmidt
2016-11-16 5:14 ` Michael Neuling
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