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* [PATCH v2] powerpc/mm/radix: Invalidate ERAT on tlbiel for POWER9 DD1
@ 2016-11-16  5:23 Michael Neuling
  2016-11-16 10:51 ` Michael Ellerman
  0 siblings, 1 reply; 4+ messages in thread
From: Michael Neuling @ 2016-11-16  5:23 UTC (permalink / raw)
  To: mpe; +Cc: benh, aneesh.kumar, linuxppc-dev, mikey

On POWER9 DD1, when we do a local TLB invalidate we also need to explicitly
invalidate the ERAT.

Signed-off-by: Michael Neuling <mikey@neuling.org>
---
v2:
  - Remove unnecessary isyncs
---
 arch/powerpc/mm/tlb-radix.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
index bda8c43be7..4a19cdd8a0 100644
--- a/arch/powerpc/mm/tlb-radix.c
+++ b/arch/powerpc/mm/tlb-radix.c
@@ -50,6 +50,9 @@ static inline void _tlbiel_pid(unsigned long pid, unsigned long ric)
 	for (set = 0; set < POWER9_TLB_SETS_RADIX ; set++) {
 		__tlbiel_pid(pid, set, ric);
 	}
+	if (cpu_has_feature(CPU_FTR_POWER9_DD1))
+		asm volatile(PPC_SLBIA(0x7)
+			     : : :"memory");
 	return;
 }
 
@@ -83,6 +86,9 @@ static inline void _tlbiel_va(unsigned long va, unsigned long pid,
 	asm volatile(PPC_TLBIEL(%0, %4, %3, %2, %1)
 		     : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory");
 	asm volatile("ptesync": : :"memory");
+	if (cpu_has_feature(CPU_FTR_POWER9_DD1))
+		asm volatile(PPC_SLBIA(0x7)
+			     : : :"memory");
 }
 
 static inline void _tlbie_va(unsigned long va, unsigned long pid,
-- 
2.9.3

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH v2] powerpc/mm/radix: Invalidate ERAT on tlbiel for POWER9 DD1
  2016-11-16  5:23 [PATCH v2] powerpc/mm/radix: Invalidate ERAT on tlbiel for POWER9 DD1 Michael Neuling
@ 2016-11-16 10:51 ` Michael Ellerman
  2016-11-16 11:02   ` Balbir Singh
  0 siblings, 1 reply; 4+ messages in thread
From: Michael Ellerman @ 2016-11-16 10:51 UTC (permalink / raw)
  To: Michael Neuling; +Cc: benh, aneesh.kumar, linuxppc-dev, mikey

Michael Neuling <mikey@neuling.org> writes:
> diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
> index bda8c43be7..4a19cdd8a0 100644
> --- a/arch/powerpc/mm/tlb-radix.c
> +++ b/arch/powerpc/mm/tlb-radix.c
> @@ -50,6 +50,9 @@ static inline void _tlbiel_pid(unsigned long pid, unsigned long ric)
>  	for (set = 0; set < POWER9_TLB_SETS_RADIX ; set++) {
>  		__tlbiel_pid(pid, set, ric);
>  	}
> +	if (cpu_has_feature(CPU_FTR_POWER9_DD1))
> +		asm volatile(PPC_SLBIA(0x7)
> +			     : : :"memory");

Ah of course I'll use slbia to invalidate the ERAT.

How about we do:

#define PPC_INVALIDATE_ERAT	PPC_SLBIA(0x7)


Or bike-shed me a name for it.

cheers

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v2] powerpc/mm/radix: Invalidate ERAT on tlbiel for POWER9 DD1
  2016-11-16 10:51 ` Michael Ellerman
@ 2016-11-16 11:02   ` Balbir Singh
  2016-11-16 11:28     ` Aneesh Kumar K.V
  0 siblings, 1 reply; 4+ messages in thread
From: Balbir Singh @ 2016-11-16 11:02 UTC (permalink / raw)
  To: Michael Ellerman, Michael Neuling; +Cc: linuxppc-dev, aneesh.kumar



On 16/11/16 21:51, Michael Ellerman wrote:
> Michael Neuling <mikey@neuling.org> writes:
>> diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
>> index bda8c43be7..4a19cdd8a0 100644
>> --- a/arch/powerpc/mm/tlb-radix.c
>> +++ b/arch/powerpc/mm/tlb-radix.c
>> @@ -50,6 +50,9 @@ static inline void _tlbiel_pid(unsigned long pid, unsigned long ric)
>>  	for (set = 0; set < POWER9_TLB_SETS_RADIX ; set++) {
>>  		__tlbiel_pid(pid, set, ric);
>>  	}
>> +	if (cpu_has_feature(CPU_FTR_POWER9_DD1))
>> +		asm volatile(PPC_SLBIA(0x7)
>> +			     : : :"memory");
> 
> Ah of course I'll use slbia to invalidate the ERAT.
> 
> How about we do:
> 
> #define PPC_INVALIDATE_ERAT	PPC_SLBIA(0x7)
> 

While you are at it, could you also add a TODO
to use a HCALL when LPCR_GTSE is not set
(when running in guest mode)

Balbir Singh.

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v2] powerpc/mm/radix: Invalidate ERAT on tlbiel for POWER9 DD1
  2016-11-16 11:02   ` Balbir Singh
@ 2016-11-16 11:28     ` Aneesh Kumar K.V
  0 siblings, 0 replies; 4+ messages in thread
From: Aneesh Kumar K.V @ 2016-11-16 11:28 UTC (permalink / raw)
  To: Balbir Singh, Michael Ellerman, Michael Neuling; +Cc: linuxppc-dev

Balbir Singh <bsingharora@gmail.com> writes:

> On 16/11/16 21:51, Michael Ellerman wrote:
>> Michael Neuling <mikey@neuling.org> writes:
>>> diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
>>> index bda8c43be7..4a19cdd8a0 100644
>>> --- a/arch/powerpc/mm/tlb-radix.c
>>> +++ b/arch/powerpc/mm/tlb-radix.c
>>> @@ -50,6 +50,9 @@ static inline void _tlbiel_pid(unsigned long pid, unsigned long ric)
>>>  	for (set = 0; set < POWER9_TLB_SETS_RADIX ; set++) {
>>>  		__tlbiel_pid(pid, set, ric);
>>>  	}
>>> +	if (cpu_has_feature(CPU_FTR_POWER9_DD1))
>>> +		asm volatile(PPC_SLBIA(0x7)
>>> +			     : : :"memory");
>> 
>> Ah of course I'll use slbia to invalidate the ERAT.
>> 
>> How about we do:
>> 
>> #define PPC_INVALIDATE_ERAT	PPC_SLBIA(0x7)
>> 
>
> While you are at it, could you also add a TODO
> to use a HCALL when LPCR_GTSE is not set
> (when running in guest mode)

In what config we use that ? With radix we always run with GTSE = 1 and
with hash we don't use tlbiel in guest.

-aneesh

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2016-11-16 11:29 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2016-11-16  5:23 [PATCH v2] powerpc/mm/radix: Invalidate ERAT on tlbiel for POWER9 DD1 Michael Neuling
2016-11-16 10:51 ` Michael Ellerman
2016-11-16 11:02   ` Balbir Singh
2016-11-16 11:28     ` Aneesh Kumar K.V

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