From: Paul Mackerras <paulus@ozlabs.org>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Cc: kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, linuxppc-dev@ozlabs.org
Subject: Re: [PATCH 07/13] KVM: PPC: Book3S HV: Adjust host/guest context switch for POWER9
Date: Sat, 19 Nov 2016 15:02:32 +1100 [thread overview]
Message-ID: <20161119040232.GB29462@fergus.ozlabs.ibm.com> (raw)
In-Reply-To: <8737ioony4.fsf@linux.vnet.ibm.com>
On Fri, Nov 18, 2016 at 08:05:47PM +0530, Aneesh Kumar K.V wrote:
> Paul Mackerras <paulus@ozlabs.org> writes:
>
> > Some special-purpose registers that were present and accessible
> > by guests on POWER8 no longer exist on POWER9, so this adds
> > feature sections to ensure that we don't try to context-switch
> > them when going into or out of a guest on POWER9. These are
> > all relatively obscure, rarely-used registers, but we had to
> > context-switch them on POWER8 to avoid creating a covert channel.
> > They are: SPMC1, SPMC2, MMCRS, CSIGR, TACR, TCSCR, and ACOP.
>
> We don't need to context-switch them even when running a power8 compat
> guest ?
They physically don't exist on the P9 chip, so how could we
context-switch them? They certainly can't be used as a covert
channel.
Accesses to them will be a no-op for the guest in privileged
(supervisor) mode (i.e., mfspr won't modify the destination
register), which could be confusing for the guest if it was expecting
to use them. SPMC1/2 and MMCRS are part of the "supervisor" PMU,
which we have never used. I think CSIGR, TACR and TCSCR are part of a
facility that was never completely implemented or usable on P8, so
nothing uses them. ACOP is used in arch/powerpc/mm/icswx.c in
conjunction with accelerators. There might be a problem there, but in
any case, with no physical ACOP register present there's no way to
save/restore it.
Paul.
next prev parent reply other threads:[~2016-11-19 4:23 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-18 7:28 [PATCH 00/13] KVM: PPC: Support POWER9 guests Paul Mackerras
2016-11-18 7:28 ` [PATCH 01/13] powerpc/64: Add some more SPRs and SPR bits for POWER9 Paul Mackerras
2016-11-18 7:28 ` [PATCH 02/13] powerpc/64: Provide functions for accessing POWER9 partition table Paul Mackerras
2016-11-18 14:27 ` Aneesh Kumar K.V
2016-11-19 4:19 ` Paul Mackerras
2016-11-19 6:35 ` Aneesh Kumar K.V
2016-11-21 2:14 ` Paul Mackerras
2016-11-19 0:45 ` Balbir Singh
2016-11-19 4:23 ` Paul Mackerras
2016-11-18 7:28 ` [PATCH 03/13] powerpc/powernv: Define real-mode versions of OPAL XICS accessors Paul Mackerras
2016-11-18 7:28 ` [PATCH 04/13] KVM: PPC: Book3S HV: Don't lose hardware R/C bit updates in H_PROTECT Paul Mackerras
2016-11-18 7:28 ` [PATCH 05/13] KVM: PPC: Book3S HV: Adapt to new HPTE format on POWER9 Paul Mackerras
2016-11-19 0:38 ` Balbir Singh
2016-11-21 2:02 ` Paul Mackerras
2016-11-18 7:28 ` [PATCH 06/13] KVM: PPC: Book3S HV: Set partition table rather than SDR1 " Paul Mackerras
2016-11-19 1:01 ` Balbir Singh
2016-11-18 7:28 ` [PATCH 07/13] KVM: PPC: Book3S HV: Adjust host/guest context switch for POWER9 Paul Mackerras
2016-11-18 14:35 ` Aneesh Kumar K.V
2016-11-19 4:02 ` Paul Mackerras [this message]
2016-11-18 7:28 ` [PATCH 08/13] KVM: PPC: Book3S HV: Add new POWER9 guest-accessible SPRs Paul Mackerras
2016-11-18 7:28 ` [PATCH 09/13] KVM: PPC: Book3S HV: Adapt TLB invalidations to work on POWER9 Paul Mackerras
2016-11-18 14:41 ` Aneesh Kumar K.V
2016-11-18 21:57 ` Benjamin Herrenschmidt
2016-11-19 4:14 ` Paul Mackerras
2016-11-19 4:41 ` Benjamin Herrenschmidt
2016-11-19 4:13 ` Paul Mackerras
2016-11-18 7:28 ` [PATCH 10/13] KVM: PPC: Book3S HV: Use msgsnd for IPIs to other cores " Paul Mackerras
2016-11-18 14:47 ` Aneesh Kumar K.V
2016-11-19 3:53 ` Paul Mackerras
2016-11-18 7:28 ` [PATCH 11/13] KVM: PPC: Book3S HV: Use OPAL XICS emulation " Paul Mackerras
2016-11-18 7:28 ` [PATCH 12/13] KVM: PPC: Book3S HV: Use stop instruction rather than nap " Paul Mackerras
2016-11-18 7:28 ` [PATCH 13/13] KVM: PPC: Book3S HV: Treat POWER9 CPU threads as independent subcores Paul Mackerras
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