From: Nicholas Piggin <npiggin@gmail.com>
To: Michael Ellerman <mpe@ellerman.id.au>
Cc: Nicholas Piggin <npiggin@gmail.com>, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH 2/2] powerpc/64s: Add SCV FSCR bit for ISA v3.0
Date: Fri, 7 Apr 2017 11:27:44 +1000 [thread overview]
Message-ID: <20170407012744.21800-3-npiggin@gmail.com> (raw)
In-Reply-To: <20170407012744.21800-1-npiggin@gmail.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/include/asm/reg.h | 2 ++
arch/powerpc/kernel/traps.c | 19 ++++++++++---------
2 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index fc879fd6bdae..d9e52a1336a6 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -310,6 +310,7 @@
#define SPRN_PMCR 0x374 /* Power Management Control Register */
/* HFSCR and FSCR bit numbers are the same */
+#define FSCR_SCV_LG 12 /* Enable System Call Vectored */
#define FSCR_MSGP_LG 10 /* Enable MSGP */
#define FSCR_TAR_LG 8 /* Enable Target Address Register */
#define FSCR_EBB_LG 7 /* Enable Event Based Branching */
@@ -320,6 +321,7 @@
#define FSCR_VECVSX_LG 1 /* Enable VMX/VSX */
#define FSCR_FP_LG 0 /* Enable Floating Point */
#define SPRN_FSCR 0x099 /* Facility Status & Control Register */
+#define FSCR_SCV __MASK(FSCR_SCV_LG)
#define FSCR_TAR __MASK(FSCR_TAR_LG)
#define FSCR_EBB __MASK(FSCR_EBB_LG)
#define FSCR_DSCR __MASK(FSCR_DSCR_LG)
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index a34d8bf3dbe4..5b307efed870 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -1432,15 +1432,16 @@ static void tm_unavailable(struct pt_regs *regs)
void facility_unavailable_exception(struct pt_regs *regs)
{
static char *facility_strings[] = {
- [FSCR_FP_LG] = "FPU",
- [FSCR_VECVSX_LG] = "VMX/VSX",
- [FSCR_DSCR_LG] = "DSCR",
- [FSCR_PM_LG] = "PMU SPRs",
- [FSCR_BHRB_LG] = "BHRB",
- [FSCR_TM_LG] = "TM",
- [FSCR_EBB_LG] = "EBB",
- [FSCR_TAR_LG] = "TAR",
- [FSCR_MSGP_LG] = "MSGP",
+ [FSCR_FP_LG] = "FPU",
+ [FSCR_VECVSX_LG] = "VMX/VSX",
+ [FSCR_DSCR_LG] = "DSCR",
+ [FSCR_PM_LG] = "PMU SPRs",
+ [FSCR_BHRB_LG] = "BHRB",
+ [FSCR_TM_LG] = "TM",
+ [FSCR_EBB_LG] = "EBB",
+ [FSCR_TAR_LG] = "TAR",
+ [FSCR_MSGP_LG] = "MSGP",
+ [FSCR_SCV_LG] = "SCV",
};
char *facility = "unknown";
u64 value;
--
2.11.0
prev parent reply other threads:[~2017-04-07 1:28 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-07 1:27 [PATCH 0/2] more facility bit additions for POWER9 Nicholas Piggin
2017-04-07 1:27 ` [PATCH 1/2] powerpc/64s: Add msgp facility unavailable log string Nicholas Piggin
2017-04-19 3:47 ` [1/2] " Michael Ellerman
2017-04-07 1:27 ` Nicholas Piggin [this message]
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