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From: Nicholas Piggin <npiggin@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: Nicholas Piggin <npiggin@gmail.com>
Subject: [PATCH 7/9] powerpc/64s: idle do not hold reservation longer than required
Date: Wed, 19 Apr 2017 23:05:49 +1000	[thread overview]
Message-ID: <20170419130551.32378-8-npiggin@gmail.com> (raw)
In-Reply-To: <20170419130551.32378-1-npiggin@gmail.com>

When taking the core idle state lock, grab it immediately like a regular
lock, rather than adding more tests in there. Holding the lock keeps it
stable, so there is no need to do it whole holding the reservation.

Reviewed-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 arch/powerpc/kernel/idle_book3s.S | 20 +++++++++++---------
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S
index 13b7044c1541..db60e051fb1c 100644
--- a/arch/powerpc/kernel/idle_book3s.S
+++ b/arch/powerpc/kernel/idle_book3s.S
@@ -569,12 +569,12 @@ BEGIN_FTR_SECTION
 	CHECK_HMI_INTERRUPT
 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
 
-	lbz	r7,PACA_THREAD_MASK(r13)
 	ld	r14,PACA_CORE_IDLE_STATE_PTR(r13)
-lwarx_loop2:
-	lwarx	r15,0,r14
-	andis.	r9,r15,PNV_CORE_IDLE_LOCK_BIT@h
+	lbz	r7,PACA_THREAD_MASK(r13)
+
 	/*
+	 * Take the core lock to synchronize against other threads.
+	 *
 	 * Lock bit is set in one of the 2 cases-
 	 * a. In the sleep/winkle enter path, the last thread is executing
 	 * fastsleep workaround code.
@@ -582,7 +582,14 @@ lwarx_loop2:
 	 * workaround undo code or resyncing timebase or restoring context
 	 * In either case loop until the lock bit is cleared.
 	 */
+1:
+	lwarx	r15,0,r14
+	andis.	r9,r15,PNV_CORE_IDLE_LOCK_BIT@h
 	bnel-	core_idle_lock_held
+	oris	r15,r15,PNV_CORE_IDLE_LOCK_BIT@h
+	stwcx.	r15,0,r14
+	bne-	1b
+	isync
 
 	andi.	r9,r15,PNV_CORE_IDLE_THREAD_BITS
 	cmpwi	cr2,r9,0
@@ -594,11 +601,6 @@ lwarx_loop2:
 	 * cr4 - gt or eq if waking up from complete hypervisor state loss.
 	 */
 
-	oris	r15,r15,PNV_CORE_IDLE_LOCK_BIT@h
-	stwcx.	r15,0,r14
-	bne-	lwarx_loop2
-	isync
-
 BEGIN_FTR_SECTION
 	lbz	r4,PACA_SUBCORE_SIBLING_MASK(r13)
 	and	r4,r4,r15
-- 
2.11.0

  parent reply	other threads:[~2017-04-19 13:06 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-19 13:05 [PATCH v2 0/9] idle fixes and changes for POWER8 and POWER9 Nicholas Piggin
2017-04-19 13:05 ` [PATCH 1/9] powerpc/64s: Remove unnecessary relocation branch from idle handler Nicholas Piggin
2017-04-23 11:53   ` [1/9] " Michael Ellerman
2017-04-19 13:05 ` [PATCH 2/9] powerpc/64s: move remaining system reset idle code into idle_book3s.S Nicholas Piggin
2017-04-19 13:05 ` [PATCH 3/9] powerpc/64s: stop using bit in HSPRG0 to test winkle Nicholas Piggin
2017-04-19 13:05 ` [PATCH 4/9] powerpc/64s: use alternative feature patching Nicholas Piggin
2017-04-19 13:05 ` [PATCH 5/9] powerpc/64s: fix POWER9 machine check handler from stop state Nicholas Piggin
2017-04-19 13:05 ` [PATCH 6/9] powerpc/64s: idle expand core idle state bits Nicholas Piggin
2017-04-19 13:05 ` Nicholas Piggin [this message]
2017-04-19 13:05 ` [PATCH 8/9] powerpc/64s: idle POWER8 avoid full state loss recovery where possible Nicholas Piggin
2017-04-19 13:05 ` [PATCH 9/9] powerpc/64s: Simplify POWER9 DD1 idle workaround code Nicholas Piggin

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