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Date: Fri, 2 Jun 2017 15:08:43 +1000
From: Nicholas Piggin <npiggin@gmail.com>
To: Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH] powerpc/64s: machine check handle ifetch from foreign
 real address for POWER9
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On Fri, 02 Jun 2017 13:14:40 +1000
Michael Ellerman <mpe@ellerman.id.au> wrote:

> Nicholas Piggin <npiggin@gmail.com> writes:
> 
> > The i-side 0111b case was missed by 7b9f71f974 ("powerpc/64s: POWER9
> > machine check handler").
> >
> > It is possible to trigger this exception by branching to a foreign real
> > address (bits [8:12] != 0) with instruction relocation off, and verify
> > the exception cause is found after this patch.  
> 
> Can you define "foreign" for people who aren't reading the chip docs :)

Yes I guess we can copy&paste the relevant part. Updated changelog:

The i-side 0111b machine check, which is "Instruction Fetch to foreign
address space", was missed by 7b9f71f974 ("powerpc/64s: POWER9 machine
check handler").

    The POWER9 processor core considers host real addresses with a
    nonzero value in RA(8:12) as foreign address space, accessible only
    by the copy and paste instructions. The copy and paste instruction
    pair can be used to invoke the Nest accelerators via the Virtual
    Accelerator Switchboard (VAS).

It is an error for any regular load/store or ifetch to go to a foreign
addresses. When relocation is on, this causes an MMU exception. When
relocation is off, a machine check exception. It is possible to trigger
this machine check by branching to a foreign address with MSR[IR]=0.

Any better?

Thanks,
Nick