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From: Michael Neuling <mikey@neuling.org>
To: mpe@ellerman.id.au, linuxppc-dev@lists.ozlabs.org
Cc: benh@kernel.crashing.org, paulus@samba.org, sam.bobroff@au1.ibm.com
Subject: [PATCH] powernv: Properly mask POWER9 DD1 PVR for different chip types
Date: Wed,  7 Jun 2017 14:11:45 +1000	[thread overview]
Message-ID: <20170607041145.3581-1-mikey@neuling.org> (raw)

Bits 48:51 in the PVR for POWER9 represent different chip types (scale
up vs out and 12 vs 24 core). Current chips have 0 here, but could be
non-zero in the future.

This changes the POWER9 DD1 mask to correctly ignore these bits 48:51.

Signed-off-by: Michael Neuling <mikey@neuling.org>
---
 arch/powerpc/kernel/cputable.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 9b3e88b1a9..89dcd94237 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -526,8 +526,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
 		.machine_check_early	= __machine_check_early_realmode_p8,
 		.platform		= "power8",
 	},
-	{	/* Power9 DD1*/
-		.pvr_mask		= 0xffffff00,
+	{	/* Power9 DD1. Bits 48:51 represent chip type so mask these */
+		.pvr_mask		= 0xffff0f00,
 		.pvr_value		= 0x004e0100,
 		.cpu_name		= "POWER9 (raw)",
 		.cpu_features		= CPU_FTRS_POWER9_DD1,
-- 
2.11.0

             reply	other threads:[~2017-06-07  4:12 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-07  4:11 Michael Neuling [this message]
2017-06-07  7:24 ` [PATCH] powernv: Properly mask POWER9 DD1 PVR for different chip types Michael Ellerman
2017-06-08  0:44   ` Michael Neuling
2017-06-08  3:44     ` Michael Ellerman

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