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From: Nicholas Piggin <npiggin@gmail.com>
To: Michael Ellerman <mpe@ellerman.id.au>
Cc: svaidy@linux.vnet.ibm.com,
	"Gautham R . Shenoy" <ego@linux.vnet.ibm.com>,
	linuxppc-dev@lists.ozlabs.org,
	"Shreyas B . Prabhu" <shreyas@linux.vnet.ibm.com>
Subject: Re: [PATCH 13/14] powerpc/64: runlatch CTRL[RUN] set optimisation
Date: Tue, 13 Jun 2017 21:56:20 +1000	[thread overview]
Message-ID: <20170613215620.16831c69@roar.ozlabs.ibm.com> (raw)
In-Reply-To: <87zidcgq50.fsf@concordia.ellerman.id.au>

On Tue, 13 Jun 2017 20:04:27 +1000
Michael Ellerman <mpe@ellerman.id.au> wrote:

> Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> writes:
> > * Nicholas Piggin <npiggin@gmail.com> [2017-06-12 09:58:34]:
> >  
> >> The CTRL register is read-only except bit 63 which is the run latch
> >> control. This means it can be updated with a mtspr rather than
> >> mfspr/mtspr.
> >> 
> >> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>  
> >  
> >> diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
> >> index baae104b16c7..a44ea034c226 100644
> >> --- a/arch/powerpc/kernel/process.c
> >> +++ b/arch/powerpc/kernel/process.c
> >> @@ -1973,13 +1969,9 @@ void notrace __ppc64_runlatch_on(void)
> >>  void notrace __ppc64_runlatch_off(void)
> >>  {
> >>  	struct thread_info *ti = current_thread_info();
> >> -	unsigned long ctrl;
> >> 
> >>  	ti->local_flags &= ~_TLF_RUNLATCH;
> >> -
> >> -	ctrl = mfspr(SPRN_CTRLF);
> >> -	ctrl &= ~CTRL_RUNLATCH;
> >> -	mtspr(SPRN_CTRLT, ctrl);
> >> +	mtspr(SPRN_CTRLT, 0);  
> >
> > Good idea.  Writing to CTRL register can change only the RUN field.
> > Was this any different in older generations?  
> 
> No AFAICS back to 2.02.
> 
> > Anton and Ben kept the mfspr/mtspr part in earlier updates to this
> > routine.  
> 
> Doing the read/modify write is forward compatible vs a new writable
> field, whereas writing the whole register with a known value is not.

Can we call that an incompatible arch change and not worry about
it? ISA says we may expect TS (read-only) field to expand, but I
guess they could shoehorn something else in there.

  reply	other threads:[~2017-06-13 11:56 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-11 23:58 [PATCH 00/14 v2] idle performance improvements Nicholas Piggin
2017-06-11 23:58 ` [PATCH 01/14] powerpc/64s: idle move soft interrupt mask logic into C code Nicholas Piggin
2017-06-12  8:37   ` Gautham R Shenoy
2017-06-12 14:46     ` Nicholas Piggin
2017-06-13  4:28       ` Gautham R Shenoy
2017-06-11 23:58 ` [PATCH 02/14] powerpc/64s: idle hotplug lazy-irq simplification Nicholas Piggin
2017-06-11 23:58 ` [PATCH 03/14] powerpc/64s: idle provide a default idle for POWER9 Nicholas Piggin
2017-06-12  8:53   ` Gautham R Shenoy
2017-06-12 14:46     ` Nicholas Piggin
2017-06-11 23:58 ` [PATCH 04/14] powerpc/64s: idle process interrupts from system reset wakeup Nicholas Piggin
2017-06-12  9:41   ` Gautham R Shenoy
2017-06-12 14:51     ` Nicholas Piggin
2017-06-11 23:58 ` [PATCH 05/14] powerpc/64s: msgclr when handling doorbell exceptions Nicholas Piggin
2017-06-12 14:38   ` Gautham R Shenoy
2017-06-11 23:58 ` [PATCH 06/14] powerpc/64s: interrupt replay balance the return branch predictor Nicholas Piggin
2017-06-12 14:41   ` Gautham R Shenoy
2017-06-13  9:51   ` Michael Ellerman
2017-06-13 11:09     ` Nicholas Piggin
2017-06-11 23:58 ` [PATCH 07/14] powerpc/64s: idle branch to handler with virtual mode offset Nicholas Piggin
2017-06-11 23:58 ` [PATCH 08/14] powerpc/64s: idle avoid SRR usage in idle sleep/wake paths Nicholas Piggin
2017-06-13 10:25   ` Gautham R Shenoy
2017-06-13 10:45     ` Nicholas Piggin
2017-06-11 23:58 ` [PATCH 09/14] powerpc/64s: idle hmi wakeup is unlikely Nicholas Piggin
2017-06-12 15:03   ` Gautham R Shenoy
2017-06-11 23:58 ` [PATCH 10/14] powerpc/64s: cpuidle set polling before enabling irqs Nicholas Piggin
2017-06-12 15:10   ` Gautham R Shenoy
2017-06-12 15:20     ` Nicholas Piggin
2017-06-11 23:58 ` [PATCH 11/14] powerpc/64s: cpuidle read mostly for common globals Nicholas Piggin
2017-06-12 15:30   ` Gautham R Shenoy
2017-06-12 17:50     ` Vaidyanathan Srinivasan
2017-06-11 23:58 ` [PATCH 12/14] powerpc/64s: cpuidle no memory barrier after break from idle Nicholas Piggin
2017-06-12 17:48   ` Vaidyanathan Srinivasan
2017-06-13 12:47     ` Nicholas Piggin
2017-06-11 23:58 ` [PATCH 13/14] powerpc/64: runlatch CTRL[RUN] set optimisation Nicholas Piggin
2017-06-12 17:11   ` Vaidyanathan Srinivasan
2017-06-13 10:04     ` Michael Ellerman
2017-06-13 11:56       ` Nicholas Piggin [this message]
2017-06-13 13:45       ` Benjamin Herrenschmidt
2017-06-14  3:34         ` Michael Ellerman
2017-06-11 23:58 ` [PATCH 14/14] powerpc/64s: idle runlatch switch is done with MSR[EE]=0 Nicholas Piggin
2017-06-12 17:00   ` Vaidyanathan Srinivasan
  -- strict thread matches above, loose matches on Subject: below --
2017-06-08 15:50 [PATCH 00/14] idle performance improvements Nicholas Piggin
2017-06-08 15:51 ` [PATCH 13/14] powerpc/64: runlatch CTRL[RUN] set optimisation Nicholas Piggin

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