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From: "Naveen N. Rao" <naveen.n.rao@linux.vnet.ibm.com>
To: Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org,
	"Shriya R . Kulkarni" <shriykul@in.ibm.com>,
	"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>,
	Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com>
Subject: Re: [PATCH] powerpc64/hw_breakpoints: Handle data breakpoints in radix mode
Date: Sun, 18 Jun 2017 15:11:00 +0530	[thread overview]
Message-ID: <20170618094100.29795-1-naveen.n.rao@linux.vnet.ibm.com> (raw)
In-Reply-To: <87d1a4wlzz.fsf@concordia.ellerman.id.au>

On 2017/06/16 03:16PM, Michael Ellerman wrote:
> "Naveen N. Rao" <naveen.n.rao@linux.vnet.ibm.com> writes:
> 
> > diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
> > index ae418b85c17c..17ee701b8336 100644
> > --- a/arch/powerpc/kernel/exceptions-64s.S
> > +++ b/arch/powerpc/kernel/exceptions-64s.S
> > @@ -1442,7 +1440,9 @@ do_hash_page:
> >  
> >  /* Here we have a page fault that hash_page can't handle. */
> >  handle_page_fault:
> > -11:	ld	r4,_DAR(r1)
> > +	andis.  r0,r4,DSISR_DABRMATCH@h
> > +	bne-    handle_dabr_fault
> 
> This broke hash. Please test hash! :)

Gah! :double-face-palm:
I don't know how I missed this... (yes, I do)

> 
> I added:
> 
> @@ -1438,11 +1436,16 @@ do_hash_page:
> 
>         /* Error */
>         blt-    13f
> +
> +       /* Reload DSISR into r4 for the DABR check below */
> +       ld      r4,_DSISR(r1)
>  #endif /* CONFIG_PPC_STD_MMU_64 */
> 
>  /* Here we have a page fault that hash_page can't handle. */
>  handle_page_fault:

As always, thanks Michael!

I think we can optimize this a bit more to eliminate the loads in
handle_page_fault. Here's an incremental patch above your changes for
-next, this time boot-tested with radix and disable_radix.

- Naveen

-----
[PATCH] powerpc64/exceptions64s: Eliminate a few un-necessary memory loads

In do_hash_page(), we re-load DSISR from stack though it is still present
in register r4. Eliminate the memory load by preserving this register.

Furthermore, handler_page_fault() reloads DAR and DSISR from memory and
this is only required if we fall through from do_hash_page().
Otherwise, r3 and r4 already have DAR and DSISR loaded. Re-use those
and have do_hash_page() reload those registers when falling-through.

Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
---
 arch/powerpc/kernel/exceptions-64s.S | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index dd619faab862..b5182a1ef3d6 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -1426,8 +1426,8 @@ do_hash_page:
 	 *
 	 * at return r3 = 0 for success, 1 for page fault, negative for error
 	 */
+	mr	r6,r4
         mr 	r4,r12
-	ld      r6,_DSISR(r1)
 	bl	__hash_page		/* build HPTE if possible */
         cmpdi	r3,0			/* see if __hash_page succeeded */
 
@@ -1437,7 +1437,8 @@ do_hash_page:
 	/* Error */
 	blt-	13f
 
-	/* Reload DSISR into r4 for the DABR check below */
+	/* Reload DAR/DSISR for handle_page_fault */
+	ld	r3,_DAR(r1)
 	ld      r4,_DSISR(r1)
 #endif /* CONFIG_PPC_STD_MMU_64 */
 
@@ -1445,8 +1446,8 @@ do_hash_page:
 handle_page_fault:
 	andis.  r0,r4,DSISR_DABRMATCH@h
 	bne-    handle_dabr_fault
-	ld	r4,_DAR(r1)
-	ld	r5,_DSISR(r1)
+	mr	r5,r4
+	mr	r4,r3
 	addi	r3,r1,STACK_FRAME_OVERHEAD
 	bl	do_page_fault
 	cmpdi	r3,0
-- 
2.13.1

  reply	other threads:[~2017-06-18  9:42 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-13 18:42 [PATCH] powerpc64/hw_breakpoints: Handle data breakpoints in radix mode Naveen N. Rao
2017-06-14  3:08 ` Aneesh Kumar K.V
2017-06-14  5:11   ` Naveen N. Rao
2017-06-14  5:13     ` Aneesh Kumar K.V
2017-06-14  6:32       ` Ram Pai
2017-06-14  6:41       ` Michael Ellerman
2017-06-14 13:41         ` Naveen N. Rao
2017-06-14  6:07 ` Anshuman Khandual
2017-06-14  9:27   ` Michael Ellerman
2017-06-16  5:16 ` Michael Ellerman
2017-06-18  9:41   ` Naveen N. Rao [this message]
2017-06-19  9:51     ` Aneesh Kumar K.V
2017-06-19 10:30       ` Naveen N. Rao
2017-06-19 18:45       ` [PATCH v2] powerpc64/exceptions: Refactor code to eliminate a few memory loads Naveen N. Rao
2017-11-10  4:34         ` Michael Ellerman
2017-11-13 17:04           ` Naveen N. Rao
2021-11-25 11:06             ` Christophe Leroy
2017-06-19 12:22 ` powerpc64/hw_breakpoints: Handle data breakpoints in radix mode Michael Ellerman

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