From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg0-x241.google.com (mail-pg0-x241.google.com [IPv6:2607:f8b0:400e:c05::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3wwL7P0FNjzDr19 for ; Sun, 25 Jun 2017 15:18:25 +1000 (AEST) Received: by mail-pg0-x241.google.com with SMTP id u62so11272459pgb.0 for ; Sat, 24 Jun 2017 22:18:24 -0700 (PDT) Date: Sun, 25 Jun 2017 15:18:04 +1000 From: Nicholas Piggin To: Benjamin Herrenschmidt Cc: Michael Neuling , mpe@ellerman.id.au, linuxppc-dev@lists.ozlabs.org Subject: Re: [PATCH v2] powerpc: Invalidate ERAT on powersave wakeup for POWER9 Message-ID: <20170625151804.30b56c67@roar.ozlabs.ibm.com> In-Reply-To: <1498325341.31581.90.camel@kernel.crashing.org> References: <20170622172616.7598-1-mikey@neuling.org> <1498325341.31581.90.camel@kernel.crashing.org> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Sat, 24 Jun 2017 12:29:01 -0500 Benjamin Herrenschmidt wrote: > On POWER9 the ERAT may be incorrect on wakeup from some stop states > that lose state. This causes random segvs and illegal instructions > when these stop states are enabled. > > This patch invalidates the ERAT on wakeup on POWER9 to prevent this > from causing a problem. > > Signed-off-by: Michael Neuling > Signed-off-by: Benjamin Herrenschmidt > --- > > v2. [BenH] Move to a place before we branch off to KVM if the > core was in a guest. Also add a comment about the > SRR1 bit extraction. This looks a bit safer to me now (avoiding KVM). My understanding is the real-mode i- and d-ERAT entries are still valid and usable, which is why this works. Reviewed-by: Nicholas Piggin > --- > arch/powerpc/kernel/exceptions-64s.S | 4 +++- > arch/powerpc/kernel/idle_book3s.S | 7 +++++++ > 2 files changed, 10 insertions(+), 1 deletion(-) > > diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S > index ae418b85c17c..b4b2c3a344c4 100644 > --- a/arch/powerpc/kernel/exceptions-64s.S > +++ b/arch/powerpc/kernel/exceptions-64s.S > @@ -99,7 +99,9 @@ EXC_VIRT_NONE(0x4000, 0x100) > #ifdef CONFIG_PPC_P7_NAP > /* > * If running native on arch 2.06 or later, check if we are waking up > - * from nap/sleep/winkle, and branch to idle handler. > + * from nap/sleep/winkle, and branch to idle handler. This tests > + * SRR1 bits 46:47. A non-0 value indicates that we are coming from > + * a power saving state. > */ > #define IDLETEST(n) \ > BEGIN_FTR_SECTION ; \ > diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S > index 4898d676dcae..3fd65739e105 100644 > --- a/arch/powerpc/kernel/idle_book3s.S > +++ b/arch/powerpc/kernel/idle_book3s.S > @@ -489,6 +489,13 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300) > */ > pnv_restore_hyp_resource_arch300: > /* > + * Workaround for POWER9, if we lost resources, the ERAT > + * might have been mixed up and needs flushing. > + */ > + blt cr3,1f > + PPC_INVALIDATE_ERAT > +1: > + /* > * POWER ISA 3. Use PSSCR to determine if we > * are waking up from deep idle state > */ >