* [PATCH] POWER9 PMU interrupt after idle workaround
@ 2017-07-10 6:19 Nicholas Piggin
2017-07-10 12:20 ` Madhavan Srinivasan
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Nicholas Piggin @ 2017-07-10 6:19 UTC (permalink / raw)
To: Michael Ellerman
Cc: Nicholas Piggin, linuxppc-dev, Madhavan Srinivasan,
Anton Blanchard, Michael Neuling, Benjamin Herrenschmidt,
Gautham R Shenoy, Vaidyanathan Srinivasan
POWER9 DD2 can see spurious PMU interrupts after state-loss idle in
some conditions.
A solution is to save and reload MMCR0 over state-loss idle.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/kernel/idle_book3s.S | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S
index 5adb390e773b..516ebef905c0 100644
--- a/arch/powerpc/kernel/idle_book3s.S
+++ b/arch/powerpc/kernel/idle_book3s.S
@@ -30,6 +30,7 @@
* Use unused space in the interrupt stack to save and restore
* registers for winkle support.
*/
+#define _MMCR0 GPR0
#define _SDR1 GPR3
#define _PTCR GPR3
#define _RPR GPR4
@@ -272,6 +273,14 @@ power_enter_stop:
b pnv_wakeup_noloss
.Lhandle_esl_ec_set:
+ /*
+ * POWER9 DD2 can incorrectly set PMAO when waking up after a
+ * state-loss idle. Saving and restoring MMCR0 over idle is a
+ * workaround.
+ */
+ mfspr r4,SPRN_MMCR0
+ std r4,_MMCR0(r1)
+
/*
* Check if the requested state is a deep idle state.
*/
@@ -450,10 +459,14 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300)
pnv_restore_hyp_resource_arch300:
/*
* Workaround for POWER9, if we lost resources, the ERAT
- * might have been mixed up and needs flushing.
+ * might have been mixed up and needs flushing. We also need
+ * to reload MMCR0 (see comment above).
*/
blt cr3,1f
PPC_INVALIDATE_ERAT
+ ld r1,PACAR1(r13)
+ ld r4,_MMCR0(r1)
+ mtspr SPRN_MMCR0,r4
1:
/*
* POWER ISA 3. Use PSSCR to determine if we
--
2.11.0
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] POWER9 PMU interrupt after idle workaround
2017-07-10 6:19 [PATCH] POWER9 PMU interrupt after idle workaround Nicholas Piggin
@ 2017-07-10 12:20 ` Madhavan Srinivasan
2017-07-14 11:41 ` Anton Blanchard
2017-07-21 11:13 ` Michael Ellerman
2 siblings, 0 replies; 4+ messages in thread
From: Madhavan Srinivasan @ 2017-07-10 12:20 UTC (permalink / raw)
To: linuxppc-dev
On Monday 10 July 2017 11:49 AM, Nicholas Piggin wrote:
> POWER9 DD2 can see spurious PMU interrupts after state-loss idle in
> some conditions.
>
> A solution is to save and reload MMCR0 over state-loss idle.
Acked-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> arch/powerpc/kernel/idle_book3s.S | 15 ++++++++++++++-
> 1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S
> index 5adb390e773b..516ebef905c0 100644
> --- a/arch/powerpc/kernel/idle_book3s.S
> +++ b/arch/powerpc/kernel/idle_book3s.S
> @@ -30,6 +30,7 @@
> * Use unused space in the interrupt stack to save and restore
> * registers for winkle support.
> */
> +#define _MMCR0 GPR0
> #define _SDR1 GPR3
> #define _PTCR GPR3
> #define _RPR GPR4
> @@ -272,6 +273,14 @@ power_enter_stop:
> b pnv_wakeup_noloss
>
> .Lhandle_esl_ec_set:
> + /*
> + * POWER9 DD2 can incorrectly set PMAO when waking up after a
> + * state-loss idle. Saving and restoring MMCR0 over idle is a
> + * workaround.
> + */
> + mfspr r4,SPRN_MMCR0
> + std r4,_MMCR0(r1)
> +
> /*
> * Check if the requested state is a deep idle state.
> */
> @@ -450,10 +459,14 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300)
> pnv_restore_hyp_resource_arch300:
> /*
> * Workaround for POWER9, if we lost resources, the ERAT
> - * might have been mixed up and needs flushing.
> + * might have been mixed up and needs flushing. We also need
> + * to reload MMCR0 (see comment above).
> */
> blt cr3,1f
> PPC_INVALIDATE_ERAT
> + ld r1,PACAR1(r13)
> + ld r4,_MMCR0(r1)
> + mtspr SPRN_MMCR0,r4
> 1:
> /*
> * POWER ISA 3. Use PSSCR to determine if we
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] POWER9 PMU interrupt after idle workaround
2017-07-10 6:19 [PATCH] POWER9 PMU interrupt after idle workaround Nicholas Piggin
2017-07-10 12:20 ` Madhavan Srinivasan
@ 2017-07-14 11:41 ` Anton Blanchard
2017-07-21 11:13 ` Michael Ellerman
2 siblings, 0 replies; 4+ messages in thread
From: Anton Blanchard @ 2017-07-14 11:41 UTC (permalink / raw)
To: Nicholas Piggin
Cc: Michael Ellerman, linuxppc-dev, Madhavan Srinivasan,
Michael Neuling, Benjamin Herrenschmidt, Gautham R Shenoy,
Vaidyanathan Srinivasan
Hi Nick,
> POWER9 DD2 can see spurious PMU interrupts after state-loss idle in
> some conditions.
>
> A solution is to save and reload MMCR0 over state-loss idle.
Thanks, looks good.
Tested-by: Anton Blanchard <anton@samba.org>
Anton
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> arch/powerpc/kernel/idle_book3s.S | 15 ++++++++++++++-
> 1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/kernel/idle_book3s.S
> b/arch/powerpc/kernel/idle_book3s.S index 5adb390e773b..516ebef905c0
> 100644 --- a/arch/powerpc/kernel/idle_book3s.S
> +++ b/arch/powerpc/kernel/idle_book3s.S
> @@ -30,6 +30,7 @@
> * Use unused space in the interrupt stack to save and restore
> * registers for winkle support.
> */
> +#define _MMCR0 GPR0
> #define _SDR1 GPR3
> #define _PTCR GPR3
> #define _RPR GPR4
> @@ -272,6 +273,14 @@ power_enter_stop:
> b pnv_wakeup_noloss
>
> .Lhandle_esl_ec_set:
> + /*
> + * POWER9 DD2 can incorrectly set PMAO when waking up after a
> + * state-loss idle. Saving and restoring MMCR0 over idle is a
> + * workaround.
> + */
> + mfspr r4,SPRN_MMCR0
> + std r4,_MMCR0(r1)
> +
> /*
> * Check if the requested state is a deep idle state.
> */
> @@ -450,10 +459,14 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300)
> pnv_restore_hyp_resource_arch300:
> /*
> * Workaround for POWER9, if we lost resources, the ERAT
> - * might have been mixed up and needs flushing.
> + * might have been mixed up and needs flushing. We also need
> + * to reload MMCR0 (see comment above).
> */
> blt cr3,1f
> PPC_INVALIDATE_ERAT
> + ld r1,PACAR1(r13)
> + ld r4,_MMCR0(r1)
> + mtspr SPRN_MMCR0,r4
> 1:
> /*
> * POWER ISA 3. Use PSSCR to determine if we
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: POWER9 PMU interrupt after idle workaround
2017-07-10 6:19 [PATCH] POWER9 PMU interrupt after idle workaround Nicholas Piggin
2017-07-10 12:20 ` Madhavan Srinivasan
2017-07-14 11:41 ` Anton Blanchard
@ 2017-07-21 11:13 ` Michael Ellerman
2 siblings, 0 replies; 4+ messages in thread
From: Michael Ellerman @ 2017-07-21 11:13 UTC (permalink / raw)
To: Nicholas Piggin
Cc: Madhavan Srinivasan, Gautham R Shenoy, Michael Neuling,
Nicholas Piggin, Anton Blanchard, linuxppc-dev
On Mon, 2017-07-10 at 06:19:38 UTC, Nicholas Piggin wrote:
> POWER9 DD2 can see spurious PMU interrupts after state-loss idle in
> some conditions.
>
> A solution is to save and reload MMCR0 over state-loss idle.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> Acked-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Applied to powerpc fixes, thanks.
https://git.kernel.org/powerpc/c/101dd590a7fa37954540cf3149a1c5
cheers
^ permalink raw reply [flat|nested] 4+ messages in thread
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2017-07-10 6:19 [PATCH] POWER9 PMU interrupt after idle workaround Nicholas Piggin
2017-07-10 12:20 ` Madhavan Srinivasan
2017-07-14 11:41 ` Anton Blanchard
2017-07-21 11:13 ` Michael Ellerman
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