From: Nicholas Piggin <nicholas.piggin@gmail.com>
To: Haren Myneni <haren@linux.vnet.ibm.com>
Cc: mpe@ellerman.id.au, herbert@gondor.apana.org.au,
mikey@neuling.org, suka@us.ibm.com, linux-crypto@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, ddstreet@ieee.org
Subject: Re: [PATCH V2 0/6] Enable NX 842 compression engine on Power9
Date: Tue, 18 Jul 2017 16:14:44 +1000 [thread overview]
Message-ID: <20170718161444.72252c9c@roar.ozlabs.ibm.com> (raw)
In-Reply-To: <1500334999.995.6.camel@hbabu-laptop>
On Mon, 17 Jul 2017 16:43:19 -0700
Haren Myneni <haren@linux.vnet.ibm.com> wrote:
> [PATCH V2 0/6] Enable NX 842 compression engine on Power9
>
> P9 introduces Virtual Accelerator Switchboard (VAS) to communicate
> with NX 842 engine. icswx function is used to access NX before.
> On powerNV systems, NX-842 driver invokes VAS functions for
> configuring RxFIFO (receive window) per each NX engine. VAS uses
> this FIFO to communicate the request to NX. The kernel opens send
> window which is used to transfer compression/decompression requests
> to VAS. It maps the send window to the corresponding RxFIFO.
> copy/paste instructions are used to pass the CRB to VAS.
>
> This patch series adds P9 NX support for 842 compression engine.
> First 4 patches reorganize the current code so that VAS function
> can be added.
> - nx842_powernv_function points to VAS function if VAS feature is
> available. Otherwise icswx function is used.
> - Move configure CRB code nx842_cfg_crb()
> - In addition to freeing co-processor structs for initialization
> failures and exit, both send and receive windows have to closed
> for VAS.
> - Move updating coprocessor info list to nx842_add_coprocs_list().
>
> The last 2 patches adds configuring and invoking VAS, and also
> checking P9 NX specific errors that are provided in co-processor
> status block (CSB) for failures.
>
> Patches have been tested on P9 DD1 system using VAS changes and
> on P8 HW to make sure no regression.
>
> This patchset depends on VAS kernel changes:
> https://lists.ozlabs.org/pipermail/linuxppc-dev/2017-May/158178.html
Just a question, we no longer invalidate the copy buffer on context
switch after this patch:
07d2a628bc ("powerpc/64s: Avoid cpabort in context switch when possible")
If your vas address mappings are visible only to kernel, only used in
process / kthread context, and only used with kernel preemption disabled,
this is okay.
If userspace can possibly copy/paste to the mappings or if you need to
sleep or call this from interrupt context, we need to work out how to
invalidate the copy buffer.
Thanks,
Nick
next prev parent reply other threads:[~2017-07-18 6:18 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-17 23:43 [PATCH V2 0/6] Enable NX 842 compression engine on Power9 Haren Myneni
2017-07-18 6:14 ` Nicholas Piggin [this message]
2017-07-18 18:06 ` Sukadev Bhattiprolu
2017-07-18 18:53 ` Haren Myneni
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