From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ozlabs.org (ozlabs.org [IPv6:2401:3900:2:1::2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3xMgGc1w6CzDrj3 for ; Wed, 2 Aug 2017 14:30:32 +1000 (AEST) Date: Wed, 2 Aug 2017 14:30:26 +1000 From: Anton Blanchard To: Nicholas Piggin Cc: Michael Ellerman , linuxppc-dev@lists.ozlabs.org, Madhavan Srinivasan , Michael Neuling , Gautham R Shenoy , Vaidyanathan Srinivasan Subject: Re: [PATCH] POWER9 PMU stops after idle workaround Message-ID: <20170802143026.34bbadde@kryten> In-Reply-To: <20170720015322.24307-1-npiggin@gmail.com> References: <20170720015322.24307-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Hi Nick, > POWER9 DD2 PMU can stop after a state-loss idle in some conditions. > > A solution is to set then clear MMCRA[60] after wake from state-loss > idle. Looks good. Acked-by: Anton Blanchard Anton > Signed-off-by: Nicholas Piggin > --- > arch/powerpc/kernel/idle_book3s.S | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/arch/powerpc/kernel/idle_book3s.S > b/arch/powerpc/kernel/idle_book3s.S index 516ebef905c0..e6252c5a57a4 > 100644 --- a/arch/powerpc/kernel/idle_book3s.S > +++ b/arch/powerpc/kernel/idle_book3s.S > @@ -460,11 +460,17 @@ pnv_restore_hyp_resource_arch300: > /* > * Workaround for POWER9, if we lost resources, the ERAT > * might have been mixed up and needs flushing. We also need > - * to reload MMCR0 (see comment above). > + * to reload MMCR0 (see comment above). We also need to set > + * then clear bit 60 in MMCRA to ensure the PMU starts > running. */ > blt cr3,1f > PPC_INVALIDATE_ERAT > ld r1,PACAR1(r13) > + mfspr r4,SPRN_MMCRA > + ori r4,r4,(1 << (63-60)) > + mtspr SPRN_MMCRA,r4 > + xori r4,r4,(1 << (63-60)) > + mtspr SPRN_MMCRA,r4 > ld r4,_MMCR0(r1) > mtspr SPRN_MMCR0,r4 > 1: