From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf0-x242.google.com (mail-pf0-x242.google.com [IPv6:2607:f8b0:400e:c00::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3xTW1c3dgkzDr2y for ; Sat, 12 Aug 2017 02:39:32 +1000 (AEST) Received: by mail-pf0-x242.google.com with SMTP id c65so3908184pfl.0 for ; Fri, 11 Aug 2017 09:39:32 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Cc: Nicholas Piggin Subject: [PATCH v2 02/14] powerpc/64s: masked interrupt avoid instruction Date: Sat, 12 Aug 2017 02:39:00 +1000 Message-Id: <20170811163912.28783-3-npiggin@gmail.com> In-Reply-To: <20170811163912.28783-1-npiggin@gmail.com> References: <20170811163912.28783-1-npiggin@gmail.com> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , EE is always enabled in SRR1 for masked interrupts, so clearing it can use xor. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index f8ad3f0eb383..c4f50a9e2ab5 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -1373,8 +1373,7 @@ masked_##_H##interrupt: \ 1: andi. r10,r10,(PACA_IRQ_DBELL|PACA_IRQ_HMI); \ bne 2f; \ mfspr r10,SPRN_##_H##SRR1; \ - rldicl r10,r10,48,1; /* clear MSR_EE */ \ - rotldi r10,r10,16; \ + xori r10,r10,MSR_EE; /* clear MSR_EE */ \ mtspr SPRN_##_H##SRR1,r10; \ 2: mtcrf 0x80,r9; \ ld r9,PACA_EXGEN+EX_R9(r13); \ -- 2.13.3