From: Segher Boessenkool <segher@kernel.crashing.org>
To: Paul Mackerras <paulus@ozlabs.org>
Cc: linuxppc-dev@ozlabs.org
Subject: Re: [PATCH v2 01/10] powerpc: Handle most loads and stores in instruction emulation code
Date: Sat, 26 Aug 2017 09:56:50 -0500 [thread overview]
Message-ID: <20170826145649.GF13471@gate.crashing.org> (raw)
In-Reply-To: <1503639722-19121-2-git-send-email-paulus@ozlabs.org>
Hi Paul,
On Fri, Aug 25, 2017 at 03:41:53PM +1000, Paul Mackerras wrote:
> diff --git a/arch/powerpc/lib/ldstfp.S b/arch/powerpc/lib/ldstfp.S
> index a58777c..6840911 100644
> --- a/arch/powerpc/lib/ldstfp.S
> +++ b/arch/powerpc/lib/ldstfp.S
> @@ -178,10 +178,10 @@ _GLOBAL(do_stfd)
> EX_TABLE(2b,3b)
>
> #ifdef CONFIG_ALTIVEC
> -/* Get the contents of vrN into v0; N is in r3. */
> +/* Get the contents of vrN into v0; N is in r3. Doesn't touch r3 or r4. */
> _GLOBAL(get_vr)
> mflr r0
> - rlwinm r3,r3,3,0xf8
> + rlwinm r6,r3,3,0xf8
> bcl 20,31,1f
> blr /* v0 is already in v0 */
> nop
Not new in your patch, but that bcl disturbs the link stack (only $+4
branches do not).
> +/* Convert single-precision to double, without disturbing FPRs. */
> +/* conv_sp_to_dp(double *dp, float *sp) */
That should be
+/* Convert double-precision to single, without disturbing FPRs. */
+/* conv_dp_to_sp(double *dp, float *sp) */
> +_GLOBAL(conv_dp_to_sp)
Segher
next prev parent reply other threads:[~2017-08-26 14:56 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-25 5:41 [PATCH v2 0/10] powerpc: Beef up single-stepping/instruction emulation infrastructure Paul Mackerras
2017-08-25 5:41 ` [PATCH v2 01/10] powerpc: Handle most loads and stores in instruction emulation code Paul Mackerras
2017-08-26 14:56 ` Segher Boessenkool [this message]
2017-08-28 5:48 ` Michael Ellerman
2017-08-25 5:41 ` [PATCH v2 02/10] powerpc: Change analyse_instr so it doesn't modify *regs Paul Mackerras
2017-08-25 5:41 ` [PATCH v2 03/10] powerpc: Fix emulation of the isel instruction Paul Mackerras
2017-08-25 5:41 ` [PATCH v2 04/10] powerpc: Add emulation for the addpcis instruction Paul Mackerras
2017-08-25 5:41 ` [PATCH v2 05/10] powerpc: Make load/store emulation use larger memory accesses Paul Mackerras
2017-08-25 5:41 ` [PATCH v2 06/10] powerpc: Emulate FP/vector/VSX loads/stores correctly when regs not live Paul Mackerras
2017-08-25 5:41 ` [PATCH v2 07/10] powerpc: Handle vector element load/stores in emulation code Paul Mackerras
2017-08-25 5:42 ` [PATCH v2 08/10] powerpc: Emulate load/store floating double pair instructions Paul Mackerras
2017-08-25 5:42 ` [PATCH v2 09/10] powerpc: Handle opposite-endian processes in emulation code Paul Mackerras
2017-08-25 5:42 ` [PATCH v2 10/10] powerpc/64: Fix update forms of loads and stores to write 64-bit EA Paul Mackerras
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