* [PATCH 2/2] powerpc/xmon: revisit SPR support
2017-07-21 5:24 [PATCH 1/2] powerpc/xmon: support dumping software pagetables Balbir Singh
@ 2017-07-21 5:24 ` Balbir Singh
0 siblings, 0 replies; 5+ messages in thread
From: Balbir Singh @ 2017-07-21 5:24 UTC (permalink / raw)
To: linuxppc-dev, mpe
This patch readjusts the SPR's adds support for IAMR/AMR
UAMOR/AMOR based on their supported ISA revisions. The
HDEC SPR is now printed with 16 hex digits instead of 8,
so that we can see the expanded values on ISA 300.
There is also support for printing the PIDR/TIDR for
ISA 300 and PSSCR and PTCR in ISA 300 hypervisor mode.
Signed-off-by: Balbir Singh <bsingharora@gmail.com>
---
arch/powerpc/xmon/xmon.c | 28 +++++++++++++++++++++++++++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 8aedfff..e025a16 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -1738,13 +1738,15 @@ static void dump_206_sprs(void)
mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR));
printf("dscr = %.16x ppr = %.16x pir = %.8x\n",
mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR));
+ printf("amr = %.16x uamor = %.16x\n",
+ mfspr(SPRN_AMR), mfspr(SPRN_UAMOR));
if (!(mfmsr() & MSR_HV))
return;
printf("sdr1 = %.16x hdar = %.16x hdsisr = %.8x\n",
mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR));
- printf("hsrr0 = %.16x hsrr1 = %.16x hdec = %.8x\n",
+ printf("hsrr0 = %.16x hsrr1 = %.16x hdec = %.16x\n",
mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC));
printf("lpcr = %.16x pcr = %.16x lpidr = %.8x\n",
mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID));
@@ -1788,6 +1790,7 @@ static void dump_207_sprs(void)
mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6));
printf("ebbhr = %.16x ebbrr = %.16x bescr = %.16x\n",
mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR));
+ printf("iamr = %.16x\n", mfspr(SPRN_IAMR));
if (!(msr & MSR_HV))
return;
@@ -1796,6 +1799,28 @@ static void dump_207_sprs(void)
mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR));
printf("dawr = %.16x dawrx = %.16x ciabr = %.16x\n",
mfspr(SPRN_DAWR), mfspr(SPRN_DAWRX), mfspr(SPRN_CIABR));
+ printf("amor = %.16x\n", mfspr(SPRN_AMOR));
+#endif
+}
+
+static void dump_300_sprs(void)
+{
+#ifdef CONFIG_PPC64
+ unsigned long msr;
+
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return;
+
+ printf("pidr = %.16x tidr = %.16x asdr = %.16x\n",
+ mfspr(SPRN_PID), mfspr(SPRN_TIDR), mfspr(SPRN_ASDR));
+
+ msr = mfmsr();
+
+ if (!(msr & MSR_HV))
+ return;
+
+ printf("ptcr = %.16x psscr = %.16x\n",
+ mfspr(SPRN_PTCR), mfspr(SPRN_PSSCR));
#endif
}
@@ -1852,6 +1877,7 @@ static void super_regs(void)
dump_206_sprs();
dump_207_sprs();
+ dump_300_sprs();
return;
}
--
2.9.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 1/2] powerpc/xmon: hdec is now 64bits
@ 2017-08-30 0:27 Balbir Singh
2017-08-30 0:27 ` [PATCH 2/2] powerpc/xmon: revisit SPR support Balbir Singh
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Balbir Singh @ 2017-08-30 0:27 UTC (permalink / raw)
To: mpe; +Cc: linuxppc-dev, Balbir Singh
ISA 300 defines hypervisor decrementer to be 64 bits in length.
This patch extends the print format for all archs to be 64 bits
Signed-off-by: Balbir Singh <bsingharora@gmail.com>
---
arch/powerpc/xmon/xmon.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 9e68f1d..1b26d53 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -1749,7 +1749,7 @@ static void dump_206_sprs(void)
printf("sdr1 = %.16lx hdar = %.16lx hdsisr = %.8x\n",
mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR));
- printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.8x\n",
+ printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\n",
mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC));
printf("lpcr = %.16lx pcr = %.16lx lpidr = %.8x\n",
mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID));
--
2.9.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] powerpc/xmon: revisit SPR support
2017-08-30 0:27 [PATCH 1/2] powerpc/xmon: hdec is now 64bits Balbir Singh
@ 2017-08-30 0:27 ` Balbir Singh
2017-08-30 13:32 ` [PATCH 1/2] powerpc/xmon: hdec is now 64bits David Laight
2017-08-31 11:36 ` [1/2] " Michael Ellerman
2 siblings, 0 replies; 5+ messages in thread
From: Balbir Singh @ 2017-08-30 0:27 UTC (permalink / raw)
To: mpe; +Cc: linuxppc-dev, Balbir Singh
This patch readjusts the SPR's adds support for IAMR/AMR
UAMOR/AMOR based on their supported ISA revisions.
There is also support for printing the PIDR/TIDR for
ISA 300 and PSSCR and PTCR in ISA 300 hypervisor mode.
SPRN_PSSCR_PR is the privileged mode access and is used
when we are not in hypervisor mode.
Signed-off-by: Balbir Singh <bsingharora@gmail.com>
---
arch/powerpc/include/asm/reg.h | 1 +
arch/powerpc/xmon/xmon.c | 34 ++++++++++++++++++++++++++++++----
2 files changed, 31 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index c36823d..2c4366a 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -356,6 +356,7 @@
#define SPRN_PMSR 0x355 /* Power Management Status Reg */
#define SPRN_PMMAR 0x356 /* Power Management Memory Activity Register */
#define SPRN_PSSCR 0x357 /* Processor Stop Status and Control Register (ISA 3.0) */
+#define SPRN_PSSCR_PR 0x337 /* PSSCR ISA 3.0, privileged mode access */
#define SPRN_PMCR 0x374 /* Power Management Control Register */
/* HFSCR and FSCR bit numbers are the same */
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 1b26d53..33351c6 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -1743,18 +1743,20 @@ static void dump_206_sprs(void)
mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR));
printf("dscr = %.16lx ppr = %.16lx pir = %.8x\n",
mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR));
+ printf("amr = %.16lx uamor = %.16lx\n",
+ mfspr(SPRN_AMR), mfspr(SPRN_UAMOR));
if (!(mfmsr() & MSR_HV))
return;
printf("sdr1 = %.16lx hdar = %.16lx hdsisr = %.8x\n",
mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR));
- printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\n",
+ printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\n",
mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC));
- printf("lpcr = %.16lx pcr = %.16lx lpidr = %.8x\n",
+ printf("lpcr = %.16lx pcr = %.16lx lpidr = %.8x\n",
mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID));
- printf("hsprg0 = %.16lx hsprg1 = %.16lx\n",
- mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1));
+ printf("hsprg0 = %.16lx hsprg1 = %.16lx amor = %.16lx\n",
+ mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR));
printf("dabr = %.16lx dabrx = %.16lx\n",
mfspr(SPRN_DABR), mfspr(SPRN_DABRX));
#endif
@@ -1793,6 +1795,7 @@ static void dump_207_sprs(void)
mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6));
printf("ebbhr = %.16lx ebbrr = %.16lx bescr = %.16lx\n",
mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR));
+ printf("iamr = %.16lx\n", mfspr(SPRN_IAMR));
if (!(msr & MSR_HV))
return;
@@ -1804,6 +1807,28 @@ static void dump_207_sprs(void)
#endif
}
+static void dump_300_sprs(void)
+{
+#ifdef CONFIG_PPC64
+ bool hv = mfmsr() & MSR_HV;
+
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return;
+
+ printf("pidr = %.16lx tidr = %.16lx\n",
+ mfspr(SPRN_PID), mfspr(SPRN_TIDR));
+ printf("asdr = %.16lx psscr = %.16lx\n",
+ mfspr(SPRN_ASDR), hv ? mfspr(SPRN_PSSCR)
+ : mfspr(SPRN_PSSCR_PR));
+
+ if (!hv)
+ return;
+
+ printf("ptcr = %.16lx\n",
+ mfspr(SPRN_PTCR));
+#endif
+}
+
static void dump_one_spr(int spr, bool show_unimplemented)
{
unsigned long val;
@@ -1857,6 +1882,7 @@ static void super_regs(void)
dump_206_sprs();
dump_207_sprs();
+ dump_300_sprs();
return;
}
--
2.9.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* RE: [PATCH 1/2] powerpc/xmon: hdec is now 64bits
2017-08-30 0:27 [PATCH 1/2] powerpc/xmon: hdec is now 64bits Balbir Singh
2017-08-30 0:27 ` [PATCH 2/2] powerpc/xmon: revisit SPR support Balbir Singh
@ 2017-08-30 13:32 ` David Laight
2017-08-31 11:36 ` [1/2] " Michael Ellerman
2 siblings, 0 replies; 5+ messages in thread
From: David Laight @ 2017-08-30 13:32 UTC (permalink / raw)
To: 'Balbir Singh', mpe@ellerman.id.au; +Cc: linuxppc-dev@lists.ozlabs.org
From: Balbir Singh
> Sent: 30 August 2017 01:28
> ISA 300 defines hypervisor decrementer to be 64 bits in length.
> This patch extends the print format for all archs to be 64 bits
>=20
> Signed-off-by: Balbir Singh <bsingharora@gmail.com>
> ---
> arch/powerpc/xmon/xmon.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>=20
> diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
> index 9e68f1d..1b26d53 100644
> --- a/arch/powerpc/xmon/xmon.c
> +++ b/arch/powerpc/xmon/xmon.c
> @@ -1749,7 +1749,7 @@ static void dump_206_sprs(void)
>=20
> printf("sdr1 =3D %.16lx hdar =3D %.16lx hdsisr =3D %.8x\n",
> mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR));
> - printf("hsrr0 =3D %.16lx hsrr1 =3D %.16lx hdec =3D %.8x\n",
> + printf("hsrr0 =3D %.16lx hsrr1 =3D %.16lx hdec =3D %.16lx\n",
> mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC));
> printf("lpcr =3D %.16lx pcr =3D %.16lx lpidr =3D %.8x\n",
> mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID));
On the face of it the patch doesn't do what the commit message says.
Not only that it is really silly to print a 32bit value with 8 extra
leading zero digits.
Something more subtle was also wrong:
There were 3 mfspr() calls, 2 printed with %lx and one with %x.
That ought to generate a warning from gcc.
David
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [1/2] powerpc/xmon: hdec is now 64bits
2017-08-30 0:27 [PATCH 1/2] powerpc/xmon: hdec is now 64bits Balbir Singh
2017-08-30 0:27 ` [PATCH 2/2] powerpc/xmon: revisit SPR support Balbir Singh
2017-08-30 13:32 ` [PATCH 1/2] powerpc/xmon: hdec is now 64bits David Laight
@ 2017-08-31 11:36 ` Michael Ellerman
2 siblings, 0 replies; 5+ messages in thread
From: Michael Ellerman @ 2017-08-31 11:36 UTC (permalink / raw)
To: Balbir Singh; +Cc: linuxppc-dev
On Wed, 2017-08-30 at 00:27:44 UTC, Balbir Singh wrote:
> ISA 300 defines hypervisor decrementer to be 64 bits in length.
> This patch extends the print format for all archs to be 64 bits
>
> Signed-off-by: Balbir Singh <bsingharora@gmail.com>
Series applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/cf9159c36cca6b3d82a6eb620055b3
cheers
^ permalink raw reply [flat|nested] 5+ messages in thread
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