From: Anton Blanchard <anton@ozlabs.org>
To: Paul Mackerras <paulus@ozlabs.org>
Cc: linuxppc-dev@ozlabs.org
Subject: Re: [PATCH] powerpc: Fix kernel crash in emulation of vector loads and stores
Date: Mon, 4 Sep 2017 15:13:30 +1000 [thread overview]
Message-ID: <20170904151330.7204e5fb@kryten> (raw)
In-Reply-To: <20170904035900.GA16532@fergus.ozlabs.ibm.com>
Hi Paul,
> Commit 350779a29f11 ("powerpc: Handle most loads and stores in
> instruction emulation code", 2017-08-30) changed the register usage
> in get_vr and put_vr with the aim of leaving the register number in
> r3 untouched on return. Unfortunately, r6 was not a good choice, as
> the callers as of 350779a29f11 store a MSR value in r6. Then, in
> commit c22435a5f3d8 ("powerpc: Emulate FP/vector/VSX loads/stores
> correctly when regs not live", 2017-08-30), the saving and restoring
> of the MSR got moved into get_vr and put_vr. Either way, the effect
> is that we put a value in MSR that only has the 0x3f8 bits non-zero,
> meaning that we are switching to 32-bit mode. That leads to a crash
> like this:
Thanks! This fixed the issues I was seeing:
Tested-by: Anton Blanchard <anton@samba.org>
Anton
next prev parent reply other threads:[~2017-09-04 5:13 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-04 3:59 [PATCH] powerpc: Fix kernel crash in emulation of vector loads and stores Paul Mackerras
2017-09-04 5:13 ` Anton Blanchard [this message]
2017-09-06 10:55 ` Michael Ellerman
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