From: Nicholas Piggin <npiggin@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
Vasant Hegde <hegdevasant@linux.vnet.ibm.com>,
Stewart Smith <stewart@linux.vnet.ibm.com>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>
Subject: [PATCH 1/3] powerpc/powernv: Avoid the secondary hold spinloop for OPAL boot
Date: Fri, 6 Oct 2017 16:10:03 +1000 [thread overview]
Message-ID: <20171006061005.29891-2-npiggin@gmail.com> (raw)
In-Reply-To: <20171006061005.29891-1-npiggin@gmail.com>
OPAL boot does not insert secondaries at 0x60 to wait at the secondary
hold spinloop. Instead it keeps them held in firmware until the
opal_start_cpu call is made, which directs them where the caller
specifies. Linux inserts them into generic_secondary_smp_init(), which
is after the secondary hold spinloop (they go on to spin at the per-CPU
paca loops, but that is another step).
So avoid waiting on this spinloop when booting with OPAL firmware.
It always just times out.
This saves 100ms boot time on bare metal, and 10s of seconds when
booting the simulator in SMP.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/kernel/head_64.S | 4 +++-
arch/powerpc/kernel/setup_64.c | 14 ++++++++++++--
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index c9e760ec7530..1ebfb3f2cbbb 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -60,7 +60,9 @@
* 1. The MMU is off, processor in HV mode, primary CPU enters at 0
* with device-tree in gpr3. We also get OPAL base in r8 and
* entry in r9 for debugging purposes
- * 2. Secondary processors enter at 0x60 with PIR in gpr3
+ * 2. Secondary processors enter as directed by opal_start_cpu(), which
+ * is generic_secondary_smp_init, with PIR in gpr3. The secondary spin
+ * code is not used.
*
* For Book3E processors:
* 1. The MMU is on running in AS0 in a state defined in ePAPR
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 3f2453858f60..eada0a7b73f8 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -363,8 +363,18 @@ void early_setup_secondary(void)
#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE)
static bool use_spinloop(void)
{
- if (!IS_ENABLED(CONFIG_PPC_BOOK3E))
- return true;
+ if (IS_ENABLED(CONFIG_PPC_BOOK3S)) {
+ /*
+ * With OPAL, secondaries do not use the secondary hold
+ * spinloop, rather they are held in firmware until
+ * opal_start_cpu() sends them to generic_secondary_smp_init
+ * directly.
+ */
+ if (firmware_has_feature(FW_FEATURE_OPAL))
+ return false;
+ else
+ return true;
+ }
/*
* When book3e boots from kexec, the ePAPR spin table does
--
2.13.3
next prev parent reply other threads:[~2017-10-06 6:10 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-06 6:10 [PATCH 0/3] some boot/shutdown improvements Nicholas Piggin
2017-10-06 6:10 ` Nicholas Piggin [this message]
2017-10-10 11:11 ` [PATCH 1/3] powerpc/powernv: Avoid the secondary hold spinloop for OPAL boot Michael Ellerman
2017-10-10 11:44 ` Nicholas Piggin
2017-10-10 15:58 ` Nicholas Piggin
2017-10-10 18:52 ` Nicholas Piggin
2017-10-11 11:27 ` Michael Ellerman
2017-10-11 14:00 ` Nicholas Piggin
2017-10-06 6:10 ` [PATCH 2/3] powerpc/powernv: Always stop secondaries before reboot/shutdown Nicholas Piggin
2017-10-06 6:10 ` [PATCH 3/3] powerpc: use NMI IPI for smp_send_stop Nicholas Piggin
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