* [PATCH v2] cxl: Dump PSL_FIR register on PSL9 error irq
@ 2017-10-11 6:14 Vaibhav Jain
2017-10-11 9:17 ` Frederic Barrat
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Vaibhav Jain @ 2017-10-11 6:14 UTC (permalink / raw)
To: linuxppc-dev, Frederic Barrat
Cc: Vaibhav Jain, Andrew Donnellan, Christophe Lombard,
Philippe Bergheaud, Alastair D'Silva
For PSL9 currently we aren't dumping the PSL FIR register when a
PSL error interrupt is triggered. Contents of this register are useful
in debugging AFU issues.
This patch fixes issue by adding a new service_layer_ops callback
cxl_native_err_irq_dump_regs_psl9() to dump the PSL_FIR registers on a
PSL error interrupt thereby bringing the behavior in line with PSL on
POWER-8. Also the existing service_layer_ops callback
for PSL8 has been renamed to cxl_native_err_irq_dump_regs_psl8().
Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
---
Changelog:
[v2] -> As created a different function to dump the FIR register for PSL9 (Fred)
---
drivers/misc/cxl/cxl.h | 3 ++-
drivers/misc/cxl/native.c | 15 ++++++++++++---
drivers/misc/cxl/pci.c | 3 ++-
3 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index 252373c2b861..111c689b1771 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -1072,7 +1072,8 @@ u64 cxl_calculate_sr(bool master, bool kernel, bool real_mode, bool p9);
void cxl_native_irq_dump_regs_psl9(struct cxl_context *ctx);
void cxl_native_irq_dump_regs_psl8(struct cxl_context *ctx);
-void cxl_native_err_irq_dump_regs(struct cxl *adapter);
+void cxl_native_err_irq_dump_regs_psl8(struct cxl *adapter);
+void cxl_native_err_irq_dump_regs_psl9(struct cxl *adapter);
int cxl_pci_vphb_add(struct cxl_afu *afu);
void cxl_pci_vphb_remove(struct cxl_afu *afu);
void cxl_release_mapping(struct cxl_context *ctx);
diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index 6cd57c756927..02b6b45b4c20 100644
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -1263,14 +1263,23 @@ static irqreturn_t native_slice_irq_err(int irq, void *data)
return IRQ_HANDLED;
}
-void cxl_native_err_irq_dump_regs(struct cxl *adapter)
+void cxl_native_err_irq_dump_regs_psl9(struct cxl *adapter)
+{
+ u64 fir1;
+
+ fir1 = cxl_p1_read(adapter, CXL_PSL9_FIR1);
+ dev_crit(&adapter->dev, "PSL_FIR: 0x%016llx\n", fir1);
+}
+
+void cxl_native_err_irq_dump_regs_psl8(struct cxl *adapter)
{
u64 fir1, fir2;
fir1 = cxl_p1_read(adapter, CXL_PSL_FIR1);
fir2 = cxl_p1_read(adapter, CXL_PSL_FIR2);
-
- dev_crit(&adapter->dev, "PSL_FIR1: 0x%016llx\nPSL_FIR2: 0x%016llx\n", fir1, fir2);
+ dev_crit(&adapter->dev,
+ "PSL_FIR1: 0x%016llx\nPSL_FIR2: 0x%016llx\n",
+ fir1, fir2);
}
static irqreturn_t native_irq_err(int irq, void *data)
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index b4ce9ea113a9..d185b47eb536 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -1763,6 +1763,7 @@ static const struct cxl_service_layer_ops psl9_ops = {
.debugfs_add_adapter_regs = cxl_debugfs_add_adapter_regs_psl9,
.debugfs_add_afu_regs = cxl_debugfs_add_afu_regs_psl9,
.psl_irq_dump_registers = cxl_native_irq_dump_regs_psl9,
+ .err_irq_dump_registers = cxl_native_err_irq_dump_regs_psl9,
.debugfs_stop_trace = cxl_stop_trace_psl9,
.write_timebase_ctrl = write_timebase_ctrl_psl9,
.timebase_read = timebase_read_psl9,
@@ -1786,7 +1787,7 @@ static const struct cxl_service_layer_ops psl8_ops = {
.debugfs_add_adapter_regs = cxl_debugfs_add_adapter_regs_psl8,
.debugfs_add_afu_regs = cxl_debugfs_add_afu_regs_psl8,
.psl_irq_dump_registers = cxl_native_irq_dump_regs_psl8,
- .err_irq_dump_registers = cxl_native_err_irq_dump_regs,
+ .err_irq_dump_registers = cxl_native_err_irq_dump_regs_psl8,
.debugfs_stop_trace = cxl_stop_trace_psl8,
.write_timebase_ctrl = write_timebase_ctrl_psl8,
.timebase_read = timebase_read_psl8,
--
2.13.6
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH v2] cxl: Dump PSL_FIR register on PSL9 error irq
2017-10-11 6:14 [PATCH v2] cxl: Dump PSL_FIR register on PSL9 error irq Vaibhav Jain
@ 2017-10-11 9:17 ` Frederic Barrat
2017-10-11 13:44 ` Andrew Donnellan
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Frederic Barrat @ 2017-10-11 9:17 UTC (permalink / raw)
To: Vaibhav Jain, linuxppc-dev
Cc: Andrew Donnellan, Christophe Lombard, Philippe Bergheaud,
Alastair D'Silva
Le 11/10/2017 à 08:14, Vaibhav Jain a écrit :
> For PSL9 currently we aren't dumping the PSL FIR register when a
> PSL error interrupt is triggered. Contents of this register are useful
> in debugging AFU issues.
>
> This patch fixes issue by adding a new service_layer_ops callback
> cxl_native_err_irq_dump_regs_psl9() to dump the PSL_FIR registers on a
> PSL error interrupt thereby bringing the behavior in line with PSL on
> POWER-8. Also the existing service_layer_ops callback
> for PSL8 has been renamed to cxl_native_err_irq_dump_regs_psl8().
>
> Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
> ---
> Changelog:
> [v2] -> As created a different function to dump the FIR register for PSL9 (Fred)
> ---
Thanks!
Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
>
> drivers/misc/cxl/cxl.h | 3 ++-
> drivers/misc/cxl/native.c | 15 ++++++++++++---
> drivers/misc/cxl/pci.c | 3 ++-
> 3 files changed, 16 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
> index 252373c2b861..111c689b1771 100644
> --- a/drivers/misc/cxl/cxl.h
> +++ b/drivers/misc/cxl/cxl.h
> @@ -1072,7 +1072,8 @@ u64 cxl_calculate_sr(bool master, bool kernel, bool real_mode, bool p9);
>
> void cxl_native_irq_dump_regs_psl9(struct cxl_context *ctx);
> void cxl_native_irq_dump_regs_psl8(struct cxl_context *ctx);
> -void cxl_native_err_irq_dump_regs(struct cxl *adapter);
> +void cxl_native_err_irq_dump_regs_psl8(struct cxl *adapter);
> +void cxl_native_err_irq_dump_regs_psl9(struct cxl *adapter);
> int cxl_pci_vphb_add(struct cxl_afu *afu);
> void cxl_pci_vphb_remove(struct cxl_afu *afu);
> void cxl_release_mapping(struct cxl_context *ctx);
> diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
> index 6cd57c756927..02b6b45b4c20 100644
> --- a/drivers/misc/cxl/native.c
> +++ b/drivers/misc/cxl/native.c
> @@ -1263,14 +1263,23 @@ static irqreturn_t native_slice_irq_err(int irq, void *data)
> return IRQ_HANDLED;
> }
>
> -void cxl_native_err_irq_dump_regs(struct cxl *adapter)
> +void cxl_native_err_irq_dump_regs_psl9(struct cxl *adapter)
> +{
> + u64 fir1;
> +
> + fir1 = cxl_p1_read(adapter, CXL_PSL9_FIR1);
> + dev_crit(&adapter->dev, "PSL_FIR: 0x%016llx\n", fir1);
> +}
> +
> +void cxl_native_err_irq_dump_regs_psl8(struct cxl *adapter)
> {
> u64 fir1, fir2;
>
> fir1 = cxl_p1_read(adapter, CXL_PSL_FIR1);
> fir2 = cxl_p1_read(adapter, CXL_PSL_FIR2);
> -
> - dev_crit(&adapter->dev, "PSL_FIR1: 0x%016llx\nPSL_FIR2: 0x%016llx\n", fir1, fir2);
> + dev_crit(&adapter->dev,
> + "PSL_FIR1: 0x%016llx\nPSL_FIR2: 0x%016llx\n",
> + fir1, fir2);
> }
>
> static irqreturn_t native_irq_err(int irq, void *data)
> diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
> index b4ce9ea113a9..d185b47eb536 100644
> --- a/drivers/misc/cxl/pci.c
> +++ b/drivers/misc/cxl/pci.c
> @@ -1763,6 +1763,7 @@ static const struct cxl_service_layer_ops psl9_ops = {
> .debugfs_add_adapter_regs = cxl_debugfs_add_adapter_regs_psl9,
> .debugfs_add_afu_regs = cxl_debugfs_add_afu_regs_psl9,
> .psl_irq_dump_registers = cxl_native_irq_dump_regs_psl9,
> + .err_irq_dump_registers = cxl_native_err_irq_dump_regs_psl9,
> .debugfs_stop_trace = cxl_stop_trace_psl9,
> .write_timebase_ctrl = write_timebase_ctrl_psl9,
> .timebase_read = timebase_read_psl9,
> @@ -1786,7 +1787,7 @@ static const struct cxl_service_layer_ops psl8_ops = {
> .debugfs_add_adapter_regs = cxl_debugfs_add_adapter_regs_psl8,
> .debugfs_add_afu_regs = cxl_debugfs_add_afu_regs_psl8,
> .psl_irq_dump_registers = cxl_native_irq_dump_regs_psl8,
> - .err_irq_dump_registers = cxl_native_err_irq_dump_regs,
> + .err_irq_dump_registers = cxl_native_err_irq_dump_regs_psl8,
> .debugfs_stop_trace = cxl_stop_trace_psl8,
> .write_timebase_ctrl = write_timebase_ctrl_psl8,
> .timebase_read = timebase_read_psl8,
>
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH v2] cxl: Dump PSL_FIR register on PSL9 error irq
2017-10-11 6:14 [PATCH v2] cxl: Dump PSL_FIR register on PSL9 error irq Vaibhav Jain
2017-10-11 9:17 ` Frederic Barrat
@ 2017-10-11 13:44 ` Andrew Donnellan
2017-10-16 13:59 ` christophe lombard
2017-10-19 4:48 ` [v2] " Michael Ellerman
3 siblings, 0 replies; 5+ messages in thread
From: Andrew Donnellan @ 2017-10-11 13:44 UTC (permalink / raw)
To: Vaibhav Jain, linuxppc-dev, Frederic Barrat
Cc: Christophe Lombard, Philippe Bergheaud, Alastair D'Silva
On 11/10/17 17:14, Vaibhav Jain wrote:
> For PSL9 currently we aren't dumping the PSL FIR register when a
> PSL error interrupt is triggered. Contents of this register are useful
> in debugging AFU issues.
>
> This patch fixes issue by adding a new service_layer_ops callback
> cxl_native_err_irq_dump_regs_psl9() to dump the PSL_FIR registers on a
> PSL error interrupt thereby bringing the behavior in line with PSL on
> POWER-8. Also the existing service_layer_ops callback
> for PSL8 has been renamed to cxl_native_err_irq_dump_regs_psl8().
>
> Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
> ---
> Changelog:
> [v2] -> As created a different function to dump the FIR register for PSL9 (Fred)
> ---
>
> drivers/misc/cxl/cxl.h | 3 ++-
> drivers/misc/cxl/native.c | 15 ++++++++++++---
> drivers/misc/cxl/pci.c | 3 ++-
> 3 files changed, 16 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
> index 252373c2b861..111c689b1771 100644
> --- a/drivers/misc/cxl/cxl.h
> +++ b/drivers/misc/cxl/cxl.h
> @@ -1072,7 +1072,8 @@ u64 cxl_calculate_sr(bool master, bool kernel, bool real_mode, bool p9);
>
> void cxl_native_irq_dump_regs_psl9(struct cxl_context *ctx);
> void cxl_native_irq_dump_regs_psl8(struct cxl_context *ctx);
> -void cxl_native_err_irq_dump_regs(struct cxl *adapter);
> +void cxl_native_err_irq_dump_regs_psl8(struct cxl *adapter);
> +void cxl_native_err_irq_dump_regs_psl9(struct cxl *adapter);
> int cxl_pci_vphb_add(struct cxl_afu *afu);
> void cxl_pci_vphb_remove(struct cxl_afu *afu);
> void cxl_release_mapping(struct cxl_context *ctx);
> diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
> index 6cd57c756927..02b6b45b4c20 100644
> --- a/drivers/misc/cxl/native.c
> +++ b/drivers/misc/cxl/native.c
> @@ -1263,14 +1263,23 @@ static irqreturn_t native_slice_irq_err(int irq, void *data)
> return IRQ_HANDLED;
> }
>
> -void cxl_native_err_irq_dump_regs(struct cxl *adapter)
> +void cxl_native_err_irq_dump_regs_psl9(struct cxl *adapter)
> +{
> + u64 fir1;
> +
> + fir1 = cxl_p1_read(adapter, CXL_PSL9_FIR1);
> + dev_crit(&adapter->dev, "PSL_FIR: 0x%016llx\n", fir1);
> +}
> +
> +void cxl_native_err_irq_dump_regs_psl8(struct cxl *adapter)
> {
> u64 fir1, fir2;
>
> fir1 = cxl_p1_read(adapter, CXL_PSL_FIR1);
> fir2 = cxl_p1_read(adapter, CXL_PSL_FIR2);
> -
> - dev_crit(&adapter->dev, "PSL_FIR1: 0x%016llx\nPSL_FIR2: 0x%016llx\n", fir1, fir2);
> + dev_crit(&adapter->dev,
> + "PSL_FIR1: 0x%016llx\nPSL_FIR2: 0x%016llx\n",
> + fir1, fir2);
> }
>
> static irqreturn_t native_irq_err(int irq, void *data)
> diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
> index b4ce9ea113a9..d185b47eb536 100644
> --- a/drivers/misc/cxl/pci.c
> +++ b/drivers/misc/cxl/pci.c
> @@ -1763,6 +1763,7 @@ static const struct cxl_service_layer_ops psl9_ops = {
> .debugfs_add_adapter_regs = cxl_debugfs_add_adapter_regs_psl9,
> .debugfs_add_afu_regs = cxl_debugfs_add_afu_regs_psl9,
> .psl_irq_dump_registers = cxl_native_irq_dump_regs_psl9,
> + .err_irq_dump_registers = cxl_native_err_irq_dump_regs_psl9,
> .debugfs_stop_trace = cxl_stop_trace_psl9,
> .write_timebase_ctrl = write_timebase_ctrl_psl9,
> .timebase_read = timebase_read_psl9,
> @@ -1786,7 +1787,7 @@ static const struct cxl_service_layer_ops psl8_ops = {
> .debugfs_add_adapter_regs = cxl_debugfs_add_adapter_regs_psl8,
> .debugfs_add_afu_regs = cxl_debugfs_add_afu_regs_psl8,
> .psl_irq_dump_registers = cxl_native_irq_dump_regs_psl8,
> - .err_irq_dump_registers = cxl_native_err_irq_dump_regs,
> + .err_irq_dump_registers = cxl_native_err_irq_dump_regs_psl8,
> .debugfs_stop_trace = cxl_stop_trace_psl8,
> .write_timebase_ctrl = write_timebase_ctrl_psl8,
> .timebase_read = timebase_read_psl8,
>
--
Andrew Donnellan OzLabs, ADL Canberra
andrew.donnellan@au1.ibm.com IBM Australia Limited
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH v2] cxl: Dump PSL_FIR register on PSL9 error irq
2017-10-11 6:14 [PATCH v2] cxl: Dump PSL_FIR register on PSL9 error irq Vaibhav Jain
2017-10-11 9:17 ` Frederic Barrat
2017-10-11 13:44 ` Andrew Donnellan
@ 2017-10-16 13:59 ` christophe lombard
2017-10-19 4:48 ` [v2] " Michael Ellerman
3 siblings, 0 replies; 5+ messages in thread
From: christophe lombard @ 2017-10-16 13:59 UTC (permalink / raw)
To: Vaibhav Jain, linuxppc-dev, Frederic Barrat
Cc: Philippe Bergheaud, Alastair D'Silva, Andrew Donnellan,
Christophe Lombard
Le 11/10/2017 à 08:14, Vaibhav Jain a écrit :
> For PSL9 currently we aren't dumping the PSL FIR register when a
> PSL error interrupt is triggered. Contents of this register are useful
> in debugging AFU issues.
>
> This patch fixes issue by adding a new service_layer_ops callback
> cxl_native_err_irq_dump_regs_psl9() to dump the PSL_FIR registers on a
> PSL error interrupt thereby bringing the behavior in line with PSL on
> POWER-8. Also the existing service_layer_ops callback
> for PSL8 has been renamed to cxl_native_err_irq_dump_regs_psl8().
>
> Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
> ---
> Changelog:
> [v2] -> As created a different function to dump the FIR register for PSL9 (Fred)
> ---
>
Thanks
Acked-by: Christophe Lombard<clombard@linux.vnet.ibm.com>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [v2] cxl: Dump PSL_FIR register on PSL9 error irq
2017-10-11 6:14 [PATCH v2] cxl: Dump PSL_FIR register on PSL9 error irq Vaibhav Jain
` (2 preceding siblings ...)
2017-10-16 13:59 ` christophe lombard
@ 2017-10-19 4:48 ` Michael Ellerman
3 siblings, 0 replies; 5+ messages in thread
From: Michael Ellerman @ 2017-10-19 4:48 UTC (permalink / raw)
To: Vaibhav Jain, linuxppc-dev, Frederic Barrat
Cc: Philippe Bergheaud, Alastair D'Silva, Vaibhav Jain,
Andrew Donnellan, Christophe Lombard
On Wed, 2017-10-11 at 06:14:41 UTC, Vaibhav Jain wrote:
> For PSL9 currently we aren't dumping the PSL FIR register when a
> PSL error interrupt is triggered. Contents of this register are useful
> in debugging AFU issues.
>
> This patch fixes issue by adding a new service_layer_ops callback
> cxl_native_err_irq_dump_regs_psl9() to dump the PSL_FIR registers on a
> PSL error interrupt thereby bringing the behavior in line with PSL on
> POWER-8. Also the existing service_layer_ops callback
> for PSL8 has been renamed to cxl_native_err_irq_dump_regs_psl8().
>
> Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
> Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/990f19ae6feefb4a6e718355719cde
cheers
^ permalink raw reply [flat|nested] 5+ messages in thread
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2017-10-11 6:14 [PATCH v2] cxl: Dump PSL_FIR register on PSL9 error irq Vaibhav Jain
2017-10-11 9:17 ` Frederic Barrat
2017-10-11 13:44 ` Andrew Donnellan
2017-10-16 13:59 ` christophe lombard
2017-10-19 4:48 ` [v2] " Michael Ellerman
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