From: Nicholas Piggin <npiggin@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>
Subject: [PATCH v2 0/3] powerpc/64s/radix: misc minor TLB flush fixes
Date: Tue, 24 Oct 2017 23:06:51 +1000 [thread overview]
Message-ID: <20171024130654.1223-1-npiggin@gmail.com> (raw)
*** BLURB HERE ***
Nicholas Piggin (3):
powerpc/64s/radix: fix preempt imbalance in TLB flush
powerpc/64s/radix: tlbie improve preempt handling
powerpc/64s/radix: Fix process table entry cache invalidation
arch/powerpc/include/asm/mmu_context.h | 4 +++
arch/powerpc/mm/mmu_context_book3s64.c | 25 ++++++++++++----
arch/powerpc/mm/tlb-radix.c | 53 +++++++++++++++++-----------------
3 files changed, 51 insertions(+), 31 deletions(-)
--
2.13.3
next reply other threads:[~2017-10-24 13:07 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-24 13:06 Nicholas Piggin [this message]
2017-10-24 13:06 ` [PATCH v2 1/3] powerpc/64s/radix: fix preempt imbalance in TLB flush Nicholas Piggin
2017-10-26 6:52 ` Aneesh Kumar K.V
2017-11-01 5:17 ` [v2,1/3] " Michael Ellerman
2017-10-24 13:06 ` [PATCH v2 2/3] powerpc/64s/radix: tlbie improve preempt handling Nicholas Piggin
2017-10-26 6:53 ` Aneesh Kumar K.V
2017-11-07 23:30 ` [v2,2/3] " Michael Ellerman
2017-10-24 13:06 ` [PATCH v2 3/3] powerpc/64s/radix: Fix process table entry cache invalidation Nicholas Piggin
2017-10-26 6:53 ` Aneesh Kumar K.V
2017-11-07 23:30 ` [v2, " Michael Ellerman
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