From: Paul Mackerras <paulus@ozlabs.org>
To: Nicholas Piggin <npiggin@au1.ibm.com>
Cc: Michael Ellerman <michael@ellerman.id.au>,
linuxppc-dev@ozlabs.org,
Markus Trippelsdorf <markus@trippelsdorf.de>
Subject: Re: [PATCH] powerpc: Fix check for copy/paste instructions in alignment handler
Date: Thu, 26 Oct 2017 09:41:32 +1100 [thread overview]
Message-ID: <20171025224132.GA31641@fergus.ozlabs.ibm.com> (raw)
In-Reply-To: <20171026012237.0320e540@roar.ozlabs.ibm.com>
On Thu, Oct 26, 2017 at 01:22:37AM +1000, Nicholas Piggin wrote:
> On Wed, 25 Oct 2017 18:16:53 +1100
> Paul Mackerras <paulus@ozlabs.org> wrote:
>
> > Commit 07d2a628bc00 ("powerpc/64s: Avoid cpabort in context switch
> > when possible", 2017-06-09) changed the definition of PPC_INST_COPY
> > and in so doing inadvertently broke the check for copy/paste
> > instructions in the alignment fault handler. The check currently
> > matches no instructions.
> >
> > This fixes it by ANDing both sides of the comparison with the mask.
>
> Thanks for fixing it. Any reason not to change the mask to 0xfc2006fe
> to include the 'last' bit that is now mandatory?
What does real hardware do if you execute the instruction without that
bit set? Does it take the alignment interrupt, or does it take an
illegal instruction interrupt (i.e. HEAI)? We need to catch all the
variants that take an alignment interrupt. If P9 hardware takes a
HEAI when that bit isn't set, then I'm fine with changing the mask.
Paul.
next prev parent reply other threads:[~2017-10-25 22:41 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <OFF18C8ACF.135B0A8D-ON002581C4.002803F5@notes.na.collabserv.com>
2017-10-25 15:22 ` [PATCH] powerpc: Fix check for copy/paste instructions in alignment handler Nicholas Piggin
2017-10-25 22:41 ` Paul Mackerras [this message]
[not found] ` <OFE75272CA.7B26179F-ON002581C4.007CAB23@notes.na.collabserv.com>
2017-10-26 5:19 ` Nicholas Piggin
2017-10-25 7:16 Paul Mackerras
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