From: Nicholas Piggin <npiggin@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
"Aneesh Kumar K . V" <aneesh.kumar@linux.vnet.ibm.com>
Subject: [PATCH v2 0/7] powerpc/64s/radix TLB flush fixes and performance improvements
Date: Tue, 7 Nov 2017 17:05:36 +1100 [thread overview]
Message-ID: <20171107060543.17309-1-npiggin@gmail.com> (raw)
Since the v1/RFC, I pulled the first 2 fix patches into this series,
and rediffed to powerpc merge branch. Dropped the final 2 patches
which were not completely agreed upon and baked.
Thanks,
Nick
Nicholas Piggin (7):
powerpc/64s/radix: tlbie improve preempt handling
powerpc/64s/radix: Fix process table entry cache invalidation
powerpc/64s/radix: optimize TLB range flush barriers
powerpc/64s/radix: Implement _tlbie(l)_va_range flush functions
powerpc/64s/radix: Optimize flush_tlb_range
powerpc/64s/radix: Introduce local single page ceiling for TLB range
flush
powerpc/64s/radix: Improve TLB flushing for page table freeing
arch/powerpc/include/asm/mmu_context.h | 4 +
arch/powerpc/mm/mmu_context_book3s64.c | 25 ++-
arch/powerpc/mm/tlb-radix.c | 318 ++++++++++++++++++++++++---------
3 files changed, 256 insertions(+), 91 deletions(-)
--
2.15.0
next reply other threads:[~2017-11-07 6:05 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-07 6:05 Nicholas Piggin [this message]
-- strict thread matches above, loose matches on Subject: below --
2017-11-07 7:53 [PATCH v2 0/7] powerpc/64s/radix TLB flush fixes and performance improvements Nicholas Piggin
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