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From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: mpe@ellerman.id.au, aneesh.kumar@linux.vnet.ibm.com
Subject: [RFC] powerpc/mm: Enable TLB flush during native_register_proc_table()
Date: Wed, 10 Jan 2018 10:23:33 +0530	[thread overview]
Message-ID: <20180110045333.10550-1-khandual@linux.vnet.ibm.com> (raw)

From: Anshuman Khandual <Khandual@linux.vnet.ibm.com>

Any changes to the partition table must be followed by appropriate TLB
flush which is not happening at present in native_register_proc_table()
path. Fix this by calling mmu_partition_table_set_entry() which does
take care of TLB flushing after the partition table update.

Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
- From code inspection
- Compile, boot tested without CONFIG_PPC_RADIX_MMU
- Though it seems to be not getting called from any where

 arch/powerpc/mm/hash_native_64.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 640cf56..89be5a6 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -758,12 +758,14 @@ static void native_flush_hash_range(unsigned long number, int local)
 static int native_register_proc_table(unsigned long base, unsigned long page_size,
 				      unsigned long table_size)
 {
-	unsigned long patb1 = base << 25; /* VSID */
+	unsigned long patb0, patb1;
 
+	patb1 = base << 25;	    /* VSID */
 	patb1 |= (page_size << 5);  /* sllp */
 	patb1 |= table_size;
 
-	partition_tb->patb1 = cpu_to_be64(patb1);
+	patb0 = be64_to_cpu(partition_tb[0].patb0);
+	mmu_partition_table_set_entry(0, patb0, patb1);
 	return 0;
 }
 
-- 
1.8.3.1

             reply	other threads:[~2018-01-10  4:53 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-10  4:53 Anshuman Khandual [this message]
2018-01-15  6:13 ` [RFC] powerpc/mm: Enable TLB flush during native_register_proc_table() Aneesh Kumar K.V

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