From: Simon Guo <wei.guo.simon@gmail.com>
To: Paul Mackerras <paulus@ozlabs.org>
Cc: linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org,
kvm-ppc@vger.kernel.org
Subject: Re: [PATCH 16/26] KVM: PPC: Book3S PR: add transaction memory save/restore skeleton for PR KVM
Date: Tue, 30 Jan 2018 10:57:58 +0800 [thread overview]
Message-ID: <20180130025758.GD3261@simonLocalRHEL7.x64> (raw)
In-Reply-To: <20180123060409.GG3924@fergus.ozlabs.ibm.com>
Hi Paul,
On Tue, Jan 23, 2018 at 05:04:09PM +1100, Paul Mackerras wrote:
> On Thu, Jan 11, 2018 at 06:11:29PM +0800, wei.guo.simon@gmail.com wrote:
> > From: Simon Guo <wei.guo.simon@gmail.com>
> >
> > The transaction memory checkpoint area save/restore behavior is
> > triggered when VCPU qemu process is switching out/into CPU. ie.
> > at kvmppc_core_vcpu_put_pr() and kvmppc_core_vcpu_load_pr().
> >
> > MSR TM active state is determined by TS bits:
> > active: 10(transactional) or 01 (suspended)
> > inactive: 00 (non-transactional)
> > We don't "fake" TM functionality for guest. We "sync" guest virtual
> > MSR TM active state(10 or 01) with shadow MSR. That is to say,
> > we don't emulate a transactional guest with a TM inactive MSR.
> >
> > TM SPR support(TFIAR/TFAR/TEXASR) has already been supported by
> > commit 9916d57e64a4 ("KVM: PPC: Book3S PR: Expose TM registers").
> > Math register support (FPR/VMX/VSX) will be done at subsequent
> > patch.
> >
> > - TM save:
> > When kvmppc_save_tm_pr() is invoked, whether TM context need to
> > be saved can be determined by current host MSR state:
> > * TM active - save TM context
> > * TM inactive - no need to do so and only save TM SPRs.
> >
> > - TM restore:
> > However when kvmppc_restore_tm_pr() is invoked, there is an
> > issue to determine whether TM restore should be performed.
> > The TM active host MSR val saved in kernel stack is not loaded yet.
>
> I don't follow this exactly. What is the value saved on the kernel
> stack?
>
> I get that we may not have done the sync from the shadow MSR back to
> the guest MSR, since that is done in kvmppc_handle_exit_pr() with
> interrupts enabled and we might be unloading because we got
> preempted. In that case we would have svcpu->in_use = 1, and we
> should in fact do the sync of the TS bits from shadow_msr to the vcpu
> MSR value in kvmppc_copy_from_svcpu(). If you did that then both the
> load and put functions could just rely on the vcpu's MSR value.
>
Yes. that looks more clean and simpler!
> > We don't know whether there is a transaction to be restored from
> > current host MSR TM status at kvmppc_restore_tm_pr(). To solve this
> > issue, we save current MSR into vcpu->arch.save_msr_tm at
> > kvmppc_save_tm_pr(), and kvmppc_restore_tm_pr() check TS bits of
> > vcpu->arch.save_msr_tm to decide whether to do TM restore.
> >
> > Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
> > Suggested-by: Paul Mackerras <paulus@ozlabs.org>
> > ---
> > arch/powerpc/include/asm/kvm_book3s.h | 6 +++++
> > arch/powerpc/include/asm/kvm_host.h | 1 +
> > arch/powerpc/kvm/book3s_pr.c | 41 +++++++++++++++++++++++++++++++++++
> > 3 files changed, 48 insertions(+)
> >
> > diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
> > index 9a66700..d8dbfa5 100644
> > --- a/arch/powerpc/include/asm/kvm_book3s.h
> > +++ b/arch/powerpc/include/asm/kvm_book3s.h
> > @@ -253,6 +253,12 @@ extern void kvmppc_copy_to_svcpu(struct kvmppc_book3s_shadow_vcpu *svcpu,
> > struct kvm_vcpu *vcpu);
> > extern void kvmppc_copy_from_svcpu(struct kvm_vcpu *vcpu,
> > struct kvmppc_book3s_shadow_vcpu *svcpu);
> > +
> > +#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
> > +void kvmppc_save_tm_pr(struct kvm_vcpu *vcpu);
> > +void kvmppc_restore_tm_pr(struct kvm_vcpu *vcpu);
> > +#endif
>
> It would be cleaner at the point where you use these if you added a
> #else clause to define a null version for the case when transactional
> memory support is not configured, like this:
>
> +#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
> +void kvmppc_save_tm_pr(struct kvm_vcpu *vcpu);
> +void kvmppc_restore_tm_pr(struct kvm_vcpu *vcpu);
> +#else
> +static inline void kvmppc_save_tm_pr(struct kvm_vcpu *vcpu) {}
> +static inline void kvmppc_restore_tm_pr(struct kvm_vcpu *vcpu) {}
> +#endif
>
> That way you don't need the #ifdef at the call site.
>
Thanks for the tip.
> > @@ -131,6 +135,10 @@ static void kvmppc_core_vcpu_put_pr(struct kvm_vcpu *vcpu)
> > if (kvmppc_is_split_real(vcpu))
> > kvmppc_unfixup_split_real(vcpu);
> >
> > +#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
> > + kvmppc_save_tm_pr(vcpu);
> > +#endif
> > +
> > kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);
> > kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
>
> I think you should do these giveup_ext/giveup_fac calls before calling
> kvmppc_save_tm_pr, because the treclaim in kvmppc_save_tm_pr will
> modify all the FP/VEC/VSX registers and the TAR.
I handled giveup_ext/giveup_fac() within kvmppc_save_tm_pr(), so that
other place (like kvmppc_emulate_treclaim() can invoke
kvmppc_save_tm_pr() easily). But I think moving the calls sequence as
you suggested above will be more readable.
Thanks,
- Simon
next prev parent reply other threads:[~2018-01-30 2:58 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-11 10:11 [PATCH 00/26] KVM: PPC: Book3S PR: Transaction memory support on PR KVM wei.guo.simon
2018-01-11 10:11 ` [PATCH 01/26] KVM: PPC: Book3S PR: Move kvmppc_save_tm/kvmppc_restore_tm to separate file wei.guo.simon
2018-01-11 10:11 ` [PATCH 02/26] KVM: PPC: Book3S PR: add new parameter (guest MSR) for kvmppc_save_tm()/kvmppc_restore_tm() wei.guo.simon
2018-01-23 5:42 ` Paul Mackerras
2018-01-30 2:33 ` Simon Guo
2018-01-11 10:11 ` [PATCH 03/26] KVM: PPC: Book3S PR: turn on FP/VSX/VMX MSR bits in kvmppc_save_tm() wei.guo.simon
2018-01-11 10:11 ` [PATCH 04/26] KVM: PPC: Book3S PR: add C function wrapper for _kvmppc_save/restore_tm() wei.guo.simon
2018-01-23 5:49 ` Paul Mackerras
2018-01-30 2:38 ` Simon Guo
2018-01-11 10:11 ` [PATCH 05/26] KVM: PPC: Book3S PR: In PR KVM suspends Transactional state when inject an interrupt wei.guo.simon
2018-01-11 10:11 ` [PATCH 06/26] KVM: PPC: Book3S PR: PR KVM pass through MSR TM/TS bits to shadow_msr wei.guo.simon
2018-01-11 10:11 ` [PATCH 07/26] KVM: PPC: Book3S PR: add TEXASR related macros wei.guo.simon
2018-01-23 5:50 ` Paul Mackerras
2018-01-11 10:11 ` [PATCH 08/26] KVM: PPC: Book3S PR: Sync TM bits to shadow msr for problem state guest wei.guo.simon
2018-01-11 10:11 ` [PATCH 09/26] KVM: PPC: Book3S PR: implement RFID TM behavior to suppress change from S0 to N0 wei.guo.simon
2018-01-11 10:11 ` [PATCH 10/26] KVM: PPC: Book3S PR: set MSR HV bit accordingly for PPC970 and others wei.guo.simon
2018-01-23 5:51 ` Paul Mackerras
2018-01-11 10:11 ` [PATCH 11/26] KVM: PPC: Book3S PR: prevent TS bits change in kvmppc_interrupt_pr() wei.guo.simon
2018-01-11 10:11 ` [PATCH 12/26] powerpc: export symbol msr_check_and_set() wei.guo.simon
2018-01-11 10:11 ` [PATCH 13/26] KVM: PPC: Book3S PR: adds new kvmppc_copyto_vcpu_tm/kvmppc_copyfrom_vcpu_tm API for PR KVM wei.guo.simon
2018-01-23 5:52 ` Paul Mackerras
2018-01-30 2:15 ` Simon Guo
2018-01-11 10:11 ` [PATCH 14/26] KVM: PPC: Book3S PR: export tm_enable()/tm_disable/tm_abort() APIs wei.guo.simon
2018-01-11 10:11 ` [PATCH 15/26] KVM: PPC: Book3S PR: add kvmppc_save/restore_tm_sprs() APIs wei.guo.simon
2018-01-11 10:11 ` [PATCH 16/26] KVM: PPC: Book3S PR: add transaction memory save/restore skeleton for PR KVM wei.guo.simon
2018-01-23 6:04 ` Paul Mackerras
2018-01-30 2:57 ` Simon Guo [this message]
2018-01-11 10:11 ` [PATCH 17/26] KVM: PPC: Book3S PR: add math support for PR KVM HTM wei.guo.simon
2018-01-23 7:29 ` Paul Mackerras
2018-01-30 3:00 ` Simon Guo
2018-01-11 10:11 ` [PATCH 18/26] KVM: PPC: Book3S PR: make mtspr/mfspr emulation behavior based on active TM SPRs wei.guo.simon
2018-01-23 8:17 ` Paul Mackerras
2018-01-30 3:02 ` Simon Guo
2018-01-11 10:11 ` [PATCH 19/26] KVM: PPC: Book3S PR: always fail transaction in guest privilege state wei.guo.simon
2018-01-23 8:30 ` Paul Mackerras
2018-01-30 3:11 ` Simon Guo
2018-01-11 10:11 ` [PATCH 20/26] KVM: PPC: Book3S PR: enable NV reg restore for reading TM SPR at " wei.guo.simon
2018-01-23 9:08 ` Paul Mackerras
2018-01-11 10:11 ` [PATCH 21/26] KVM: PPC: Book3S PR: adds emulation for treclaim wei.guo.simon
2018-01-23 9:23 ` Paul Mackerras
2018-01-30 3:18 ` Simon Guo
2018-01-11 10:11 ` [PATCH 22/26] KVM: PPC: Book3S PR: add emulation for trechkpt in PR KVM wei.guo.simon
2018-01-23 9:36 ` Paul Mackerras
2018-01-30 3:13 ` Simon Guo
2018-01-11 10:11 ` [PATCH 23/26] KVM: PPC: Book3S PR: add emulation for tabort. for privilege guest wei.guo.simon
2018-01-23 9:44 ` Paul Mackerras
2018-01-30 3:24 ` Simon Guo
2018-01-11 10:11 ` [PATCH 24/26] KVM: PPC: Book3S PR: add guard code to prevent returning to guest with PR=0 and Transactional state wei.guo.simon
2018-01-11 10:11 ` [PATCH 25/26] KVM: PPC: Book3S PR: Support TAR handling for PR KVM HTM wei.guo.simon
2018-01-24 4:02 ` Paul Mackerras
2018-01-30 3:26 ` Simon Guo
2018-01-11 10:11 ` [PATCH 26/26] KVM: PPC: Book3S PR: enable HTM for PR KVM for KVM_CHECK_EXTENSION ioctl wei.guo.simon
2018-01-11 13:56 ` [PATCH 00/26] KVM: PPC: Book3S PR: Transaction memory support on PR KVM Gustavo Romero
2018-01-11 22:04 ` Benjamin Herrenschmidt
2018-01-12 2:41 ` Simon Guo
2018-01-23 5:38 ` Paul Mackerras
2018-01-23 7:16 ` Paul Mackerras
2018-01-27 13:10 ` Simon Guo
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