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From: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
To: linuxppc-dev@lists.ozlabs.org,
	Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Cc: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>,
	Andrew Donnellan <andrew.donnellan@au1.ibm.com>,
	Christophe Lombard <christophe_lombard@fr.ibm.com>,
	Philippe Bergheaud <philippe.bergheaud@fr.ibm.com>,
	"Alastair D'Silva" <alastair@linux.ibm.com>
Subject: [PATCH 0/3] Provide ability to enable PSL traces on card probe
Date: Fri,  9 Feb 2018 09:55:32 +0530	[thread overview]
Message-ID: <20180209042535.16845-1-vaibhav@linux.vnet.ibm.com> (raw)

This patch-set updates the cxl adapter probe procedure to selectively enable
PSL-traces at the end of a successful probe for a PSL9 based adapter. This would
let implementors of AFUs that use in-kernel apis to interact with the CXL
adapter get early debug data.

This feature is controlled via a new module parameter named 'enable_psltrace'
which is enabled by default. During adapter probe is this parameter is set
cxl will start PSL-traces on the adapter via PSL_TRACECFG register. The needed
sequence values written to the register was provided by the PSL h/w team.

This patch set is based on an earlier patch titled
"cxl: Remove function write_timebase_ctrl_psl9() for PSL9" available at [1].

Ref: [1] http://patchwork.ozlabs.org/patch/871199/ 
Vaibhav Jain (3):
  cxl: Introduce various enums/defines for PSL9 trace arrays
  cxl: Introduce module parameter 'enable_psltrace'
  cxl: Provide implementation for sl_ops.start_psltrace on PSL9

 drivers/misc/cxl/cxl.h    | 31 ++++++++++++++--
 drivers/misc/cxl/main.c   |  4 +++
 drivers/misc/cxl/native.c |  8 ++---
 drivers/misc/cxl/pci.c    | 91 ++++++++++++++++++++++++++++++++++++++++++-----
 4 files changed, 119 insertions(+), 15 deletions(-)

-- 
2.14.3

             reply	other threads:[~2018-02-09  4:26 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-09  4:25 Vaibhav Jain [this message]
2018-02-09  4:25 ` [PATCH 1/3] cxl: Introduce various enums/defines for PSL9 trace arrays Vaibhav Jain
2018-02-09 13:08   ` christophe lombard
2018-02-11 16:46     ` Vaibhav Jain
2018-02-09  4:25 ` [PATCH 2/3] cxl: Introduce module parameter 'enable_psltrace' Vaibhav Jain
2018-02-09 13:14   ` christophe lombard
2018-02-11 17:10     ` Vaibhav Jain
2018-02-12 10:46       ` christophe lombard
2018-02-12 13:54       ` Frederic Barrat
2018-02-13 11:07         ` Vaibhav Jain
2018-02-09  4:25 ` [PATCH 3/3] cxl: Provide implementation for sl_ops.start_psltrace on PSL9 Vaibhav Jain

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