From: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
To: linuxppc-dev@lists.ozlabs.org,
Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Cc: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>,
Andrew Donnellan <andrew.donnellan@au1.ibm.com>,
Christophe Lombard <christophe_lombard@fr.ibm.com>,
Philippe Bergheaud <philippe.bergheaud@fr.ibm.com>,
"Alastair D'Silva" <alastair@linux.ibm.com>
Subject: [PATCH 2/3] cxl: Introduce module parameter 'enable_psltrace'
Date: Fri, 9 Feb 2018 09:55:34 +0530 [thread overview]
Message-ID: <20180209042535.16845-3-vaibhav@linux.vnet.ibm.com> (raw)
In-Reply-To: <20180209042535.16845-1-vaibhav@linux.vnet.ibm.com>
We introduce a new module parameter named 'enable_psltrace' which asks cxl
to start(by default) psl-traces on an adapter as soon as its probe is
finished. In case this default behavior is not needed then this
module parameter can be set to '0'.
Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
---
drivers/misc/cxl/cxl.h | 2 ++
drivers/misc/cxl/main.c | 4 ++++
drivers/misc/cxl/pci.c | 3 +++
3 files changed, 9 insertions(+)
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index 81da307b60c0..1af66451cbb4 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -28,6 +28,7 @@
#include <uapi/misc/cxl.h>
extern uint cxl_verbose;
+extern bool cxl_enable_psltrace;
#define CXL_TIMEOUT 5
@@ -678,6 +679,7 @@ struct cxl_service_layer_ops {
void (*psl_irq_dump_registers)(struct cxl_context *ctx);
void (*err_irq_dump_registers)(struct cxl *adapter);
void (*stop_psltrace)(struct cxl *adapter);
+ void (*start_psltrace)(struct cxl *adapter);
void (*write_timebase_ctrl)(struct cxl *adapter);
u64 (*timebase_read)(struct cxl *adapter);
int capi_mode;
diff --git a/drivers/misc/cxl/main.c b/drivers/misc/cxl/main.c
index c1ba0d42cbc8..593f2cdba3d8 100644
--- a/drivers/misc/cxl/main.c
+++ b/drivers/misc/cxl/main.c
@@ -34,6 +34,10 @@ uint cxl_verbose;
module_param_named(verbose, cxl_verbose, uint, 0600);
MODULE_PARM_DESC(verbose, "Enable verbose dmesg output");
+bool cxl_enable_psltrace = true;
+module_param_named(enable_psltrace, cxl_enable_psltrace, bool, 0600);
+MODULE_PARM_DESC(enable_psltrace, "Set PSL traces on probe. default: on");
+
const struct cxl_backend_ops *cxl_ops;
int cxl_afu_slbia(struct cxl_afu *afu)
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 926b13973b73..9e8b8525534c 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -1726,6 +1726,9 @@ static int cxl_configure_adapter(struct cxl *adapter, struct pci_dev *dev)
if ((rc = cxl_native_register_psl_err_irq(adapter)))
goto err;
+ if (cxl_enable_psltrace && adapter->native->sl_ops->start_psltrace)
+ adapter->native->sl_ops->start_psltrace(adapter);
+
return 0;
err:
--
2.14.3
next prev parent reply other threads:[~2018-02-09 4:26 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-09 4:25 [PATCH 0/3] Provide ability to enable PSL traces on card probe Vaibhav Jain
2018-02-09 4:25 ` [PATCH 1/3] cxl: Introduce various enums/defines for PSL9 trace arrays Vaibhav Jain
2018-02-09 13:08 ` christophe lombard
2018-02-11 16:46 ` Vaibhav Jain
2018-02-09 4:25 ` Vaibhav Jain [this message]
2018-02-09 13:14 ` [PATCH 2/3] cxl: Introduce module parameter 'enable_psltrace' christophe lombard
2018-02-11 17:10 ` Vaibhav Jain
2018-02-12 10:46 ` christophe lombard
2018-02-12 13:54 ` Frederic Barrat
2018-02-13 11:07 ` Vaibhav Jain
2018-02-09 4:25 ` [PATCH 3/3] cxl: Provide implementation for sl_ops.start_psltrace on PSL9 Vaibhav Jain
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