From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au
Cc: linuxppc-dev@lists.ozlabs.org,
"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Subject: [PATCH] powerpc/mm/hash: Move the slb_addr_limit check within PPC_MM_SLICES
Date: Wed, 7 Mar 2018 17:45:39 +0530 [thread overview]
Message-ID: <20180307121539.20745-1-aneesh.kumar@linux.vnet.ibm.com> (raw)
Should not have any impact, because we always select PP_MM_SLICES these days.
Nevertheless it is good to indicate that slb_addr_limit is available only
with slice code.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
arch/powerpc/mm/slb_low.S | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
index c66cb06e73a1..337ef162851d 100644
--- a/arch/powerpc/mm/slb_low.S
+++ b/arch/powerpc/mm/slb_low.S
@@ -166,6 +166,8 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
*/
cmpdi r9, 0
bne- 8f
+
+#ifdef CONFIG_PPC_MM_SLICES
/*
* user space make sure we are within the allowed limit
*/
@@ -183,7 +185,6 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
* really do dynamic patching unfortunately as processes might flip
* between 4k and 64k standard page size
*/
-#ifdef CONFIG_PPC_MM_SLICES
/* r10 have esid */
cmpldi r10,16
/* below SLICE_LOW_TOP */
--
2.14.3
next reply other threads:[~2018-03-07 12:15 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-07 12:15 Aneesh Kumar K.V [this message]
2018-03-30 12:35 ` [PATCH] powerpc/mm/hash: Move the slb_addr_limit check within PPC_MM_SLICES Michael Ellerman
2018-03-30 15:07 ` LEROY Christophe
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