[PATCH] powerpc/mm/hash: Move the slb_addr_limit check within PPC_MM_SLICES

[PATCH] powerpc/mm/hash: Move the slb_addr_limit check within PPC_MM_SLICES

[Aneesh Kumar K.V]

Should not have any impact, because we always select PP_MM_SLICES these days.
Nevertheless it is good to indicate that slb_addr_limit is available only
with slice code.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
 arch/powerpc/mm/slb_low.S | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
index c66cb06e73a1..337ef162851d 100644
--- a/arch/powerpc/mm/slb_low.S
+++ b/arch/powerpc/mm/slb_low.S
@@ -166,6 +166,8 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
 	 */
 	cmpdi	r9, 0
 	bne-	8f
+
+#ifdef CONFIG_PPC_MM_SLICES
         /*
          * user space make sure we are within the allowed limit
 	 */
@@ -183,7 +185,6 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
 	 * really do dynamic patching unfortunately as processes might flip
 	 * between 4k and 64k standard page size
 	 */
-#ifdef CONFIG_PPC_MM_SLICES
 	/* r10 have esid */
 	cmpldi	r10,16
 	/* below SLICE_LOW_TOP */
-- 
2.14.3

Re: [PATCH] powerpc/mm/hash: Move the slb_addr_limit check within PPC_MM_SLICES

[Michael Ellerman]

"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> writes:

> Should not have any impact, because we always select PP_MM_SLICES these days.
> Nevertheless it is good to indicate that slb_addr_limit is available only
> with slice code.

That file can only be built if PPC_MM_SLICES=y.

So let's just remove the ifdef entirely.

These days PPC_MM_SLICES == PPC_BOOK3S_64, so we should remove
PPC_MM_SLICES #defines wherever possible and replace them with
PPC_BOOK3S_64 otherwise IMO.

cheers

> diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
> index c66cb06e73a1..337ef162851d 100644
> --- a/arch/powerpc/mm/slb_low.S
> +++ b/arch/powerpc/mm/slb_low.S
> @@ -166,6 +166,8 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
>  	 */
>  	cmpdi	r9, 0
>  	bne-	8f
> +
> +#ifdef CONFIG_PPC_MM_SLICES
>          /*
>           * user space make sure we are within the allowed limit
>  	 */
> @@ -183,7 +185,6 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
>  	 * really do dynamic patching unfortunately as processes might flip
>  	 * between 4k and 64k standard page size
>  	 */
> -#ifdef CONFIG_PPC_MM_SLICES
>  	/* r10 have esid */
>  	cmpldi	r10,16
>  	/* below SLICE_LOW_TOP */
> -- 
> 2.14.3

Re: [PATCH] powerpc/mm/hash: Move the slb_addr_limit check within PPC_MM_SLICES

[LEROY Christophe]

Michael Ellerman <mpe@ellerman.id.au> a =C3=A9crit=C2=A0:

> "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> writes:
>
>> Should not have any impact, because we always select PP_MM_SLICES=20=20
>>=20these days.
>> Nevertheless it is good to indicate that slb_addr_limit is available onl=
y
>> with slice code.
>
> That file can only be built if PPC_MM_SLICES=3Dy.
>
> So let's just remove the ifdef entirely.
>
> These days PPC_MM_SLICES =3D=3D PPC_BOOK3S_64, so we should remove
> PPC_MM_SLICES #defines wherever possible and replace them with
> PPC_BOOK3S_64 otherwise IMO.

PPC8xx also selects PPC_MM_SLICES when hugepages is selected.

Christophe

>
> cheers
>
>> diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
>> index c66cb06e73a1..337ef162851d 100644
>> --- a/arch/powerpc/mm/slb_low.S
>> +++ b/arch/powerpc/mm/slb_low.S
>> @@ -166,6 +166,8 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
>>  	 */
>>  	cmpdi	r9, 0
>>  	bne-	8f
>> +
>> +#ifdef CONFIG_PPC_MM_SLICES
>>          /*
>>           * user space make sure we are within the allowed limit
>>  	 */
>> @@ -183,7 +185,6 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
>>  	 * really do dynamic patching unfortunately as processes might flip
>>  	 * between 4k and 64k standard page size
>>  	 */
>> -#ifdef CONFIG_PPC_MM_SLICES
>>  	/* r10 have esid */
>>  	cmpldi	r10,16
>>  	/* below SLICE_LOW_TOP */
>> --
>> 2.14.3