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From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au
Cc: linuxppc-dev@lists.ozlabs.org,
	"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Subject: [PATCH V6 0/4] Add support for 4PB virtual address space on hash
Date: Mon, 26 Mar 2018 15:34:46 +0530	[thread overview]
Message-ID: <20180326100450.18614-1-aneesh.kumar@linux.vnet.ibm.com> (raw)

This patch series extended the max virtual address space value from 512TB
to 4PB with 64K page size. We do that by allocating one vsid context for
each 512TB range. More details of that is explained in patch 3.

Changes from V5:
* Fix for loop segmentation fault.
* updates from Michael

Changes from V4:
* Move context allocation to mmap time instead of SLB miss time
* Address review comments 

Changes from V3:
* move extended_id to be a union with mm_context_t id. This reduce some
 array index complexity.
* Add addr_limit check when handling slb miss for extended context

Changes from V2:
* Rebased on top of slice_mask series from Nick Piggin
* Fixed segfault when mmap with 512TB hint address


Aneesh Kumar K.V (4):
  powerpc/mm/slice: Consolidate return path in slice_get_unmapped_area()
  powerpc/mm: Add support for handling > 512TB address in SLB miss
  powerpc/mm/hash64: Increase the VA range
  powerpc/mm/hash: Don't memset pgd table if not needed

 arch/powerpc/include/asm/book3s/64/hash-4k.h  |   6 ++
 arch/powerpc/include/asm/book3s/64/hash-64k.h |   8 +-
 arch/powerpc/include/asm/book3s/64/mmu.h      |  33 +++++++-
 arch/powerpc/include/asm/book3s/64/pgalloc.h  |  12 ++-
 arch/powerpc/include/asm/mmu_context.h        |  39 ++++++++++
 arch/powerpc/include/asm/processor.h          |  15 +++-
 arch/powerpc/kernel/exceptions-64s.S          |  11 ++-
 arch/powerpc/kernel/traps.c                   |  12 ---
 arch/powerpc/mm/copro_fault.c                 |   2 +-
 arch/powerpc/mm/hash_utils_64.c               |   4 +-
 arch/powerpc/mm/init_64.c                     |   6 --
 arch/powerpc/mm/mmu_context_book3s64.c        |  15 +++-
 arch/powerpc/mm/pgtable-hash64.c              |   6 +-
 arch/powerpc/mm/pgtable_64.c                  |   5 --
 arch/powerpc/mm/slb.c                         | 108 ++++++++++++++++++++++++++
 arch/powerpc/mm/slb_low.S                     |  11 ++-
 arch/powerpc/mm/slice.c                       |  49 ++++++++----
 arch/powerpc/mm/tlb_hash64.c                  |   2 +-
 18 files changed, 288 insertions(+), 56 deletions(-)

-- 
2.14.3

             reply	other threads:[~2018-03-26 10:05 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-26 10:04 Aneesh Kumar K.V [this message]
2018-03-26 10:04 ` [PATCH V6 1/4] powerpc/mm/slice: Consolidate return path in slice_get_unmapped_area() Aneesh Kumar K.V
2018-03-31 14:04   ` [V6, " Michael Ellerman
2018-03-26 10:04 ` [PATCH V6 2/4] powerpc/mm: Add support for handling > 512TB address in SLB miss Aneesh Kumar K.V
2018-04-09  7:19   ` Christophe LEROY
2018-04-09  8:33     ` Aneesh Kumar K.V
2018-04-09  8:55       ` Christophe LEROY
2018-03-26 10:04 ` [PATCH V6 3/4] powerpc/mm/hash64: Increase the VA range Aneesh Kumar K.V
2018-03-26 10:04 ` [PATCH V6 4/4] powerpc/mm/hash: Don't memset pgd table if not needed Aneesh Kumar K.V

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