From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 40MJ5Q2Bt5zDqwG for ; Thu, 12 Apr 2018 21:07:05 +1000 (AEST) Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w3CB0asL120784 for ; Thu, 12 Apr 2018 07:07:02 -0400 Received: from e06smtp10.uk.ibm.com (e06smtp10.uk.ibm.com [195.75.94.106]) by mx0b-001b2d01.pphosted.com with ESMTP id 2ha4u0kvsy-1 (version=TLSv1.2 cipher=AES256-SHA256 bits=256 verify=NOT) for ; Thu, 12 Apr 2018 07:07:02 -0400 Received: from localhost by e06smtp10.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 12 Apr 2018 12:07:00 +0100 From: Philippe Bergheaud To: linuxppc-dev@lists.ozlabs.org Cc: fbarrat@linux.ibm.com, clombard@linux.ibm.com, benh@au1.ibm.com, Philippe Bergheaud Subject: [PATCH] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode Date: Thu, 12 Apr 2018 13:06:42 +0200 Message-Id: <20180412110642.26454-1-felix@linux.ibm.com> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Skiboot used to set the default Tunnel BAR register value when capi mode was enabled. This approach was ok for the cxl driver, but prevented other drivers from choosing different values. Skiboot versions > 5.11 will not set the default value any longer. This patch modifies the cxl driver to set/reset the Tunnel BAR register when entering/exiting the cxl mode, with pnv_pci_set_tunnel_bar(). Signed-off-by: Philippe Bergheaud --- drivers/misc/cxl/pci.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c index 83f1d08058fc..3beff9188446 100644 --- a/drivers/misc/cxl/pci.c +++ b/drivers/misc/cxl/pci.c @@ -1742,6 +1742,9 @@ static int cxl_configure_adapter(struct cxl *adapter, struct pci_dev *dev) /* Required for devices using CAPP DMA mode, harmless for others */ pci_set_master(dev); + if ((rc = pnv_pci_set_tunnel_bar(dev, 0x00020000E0000000ull, 1))) + goto err; + if ((rc = pnv_phb_to_cxl_mode(dev, adapter->native->sl_ops->capi_mode))) goto err; @@ -1768,6 +1771,7 @@ static void cxl_deconfigure_adapter(struct cxl *adapter) { struct pci_dev *pdev = to_pci_dev(adapter->dev.parent); + pnv_pci_set_tunnel_bar(pdev, 0x00020000E0000000ull, 0); cxl_native_release_psl_err_irq(adapter); cxl_unmap_adapter_regs(adapter); -- 2.16.2