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From: Simon Guo <wei.guo.simon@gmail.com>
To: Segher Boessenkool <segher@kernel.crashing.org>
Cc: linuxppc-dev@lists.ozlabs.org,
	"Naveen N.  Rao" <naveen.n.rao@linux.vnet.ibm.com>,
	Cyril Bur <cyrilbur@gmail.com>
Subject: Re: [PATCH v6 1/4] powerpc/64: Align bytes before fall back to .Lshort in powerpc64 memcmp()
Date: Wed, 30 May 2018 16:11:50 +0800	[thread overview]
Message-ID: <20180530081150.GA5951@simonLocalRHEL7.x64> (raw)
In-Reply-To: <20180528103505.GY17342@gate.crashing.org>

Hi Segher,
On Mon, May 28, 2018 at 05:35:12AM -0500, Segher Boessenkool wrote:
> On Fri, May 25, 2018 at 12:07:33PM +0800, wei.guo.simon@gmail.com wrote:
> >  _GLOBAL(memcmp)
> >  	cmpdi	cr1,r5,0
> >  
> > -	/* Use the short loop if both strings are not 8B aligned */
> > -	or	r6,r3,r4
> > +	/* Use the short loop if the src/dst addresses are not
> > +	 * with the same offset of 8 bytes align boundary.
> > +	 */
> > +	xor	r6,r3,r4
> >  	andi.	r6,r6,7
> >  
> > -	/* Use the short loop if length is less than 32B */
> > -	cmpdi	cr6,r5,31
> > +	/* Fall back to short loop if compare at aligned addrs
> > +	 * with less than 8 bytes.
> > +	 */
> > +	cmpdi   cr6,r5,7
> >  
> >  	beq	cr1,.Lzero
> > -	bne	.Lshort
> > -	bgt	cr6,.Llong
> > +	bgt	cr6,.Lno_short
> 
> If this doesn't use cr0 anymore, you can do  rlwinm r6,r6,0,7  instead of
> andi r6,r6,7 .
> 
CR0 is used at .Lno_short handling.

> > +.Lsameoffset_8bytes_make_align_start:
> > +	/* attempt to compare bytes not aligned with 8 bytes so that
> > +	 * rest comparison can run based on 8 bytes alignment.
> > +	 */
> > +	andi.   r6,r3,7
> > +
> > +	/* Try to compare the first double word which is not 8 bytes aligned:
> > +	 * load the first double word at (src & ~7UL) and shift left appropriate
> > +	 * bits before comparision.
> > +	 */
> > +	clrlwi  r6,r3,29
> > +	rlwinm  r6,r6,3,0,28
> 
> Those last two lines are together just
>   rlwinm r6,r3,3,0x1c
> 
Yes. I will combine them.

> > +	subfc.	r5,r6,r5
> 
> Why subfc?  You don't use the carry.
OK. I will use subfc instead.

> 
> > +	rlwinm  r6,r6,3,0,28
> 
> That's
>   slwi r6,r6,3
Yes.

> 
> > +	bgt	cr0,8f
> > +	li	r3,-1
> > +8:
> > +	blr
> 
>   blelr
>   li r3,-1
>   blr
Sure. That looks more impact.

> 
> (and more of the same things elsewhere).
> 
> 
> Segher

Thanks for your good comments.

BR,
- Simon

  reply	other threads:[~2018-05-30  8:11 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-25  4:07 [PATCH v6 0/4] powerpc/64: memcmp() optimization wei.guo.simon
2018-05-25  4:07 ` [PATCH v6 1/4] powerpc/64: Align bytes before fall back to .Lshort in powerpc64 memcmp() wei.guo.simon
2018-05-28 10:35   ` Segher Boessenkool
2018-05-30  8:11     ` Simon Guo [this message]
2018-05-30  8:27       ` Segher Boessenkool
2018-05-30  9:02         ` Simon Guo
2018-05-25  4:07 ` [PATCH v6 2/4] powerpc/64: enhance memcmp() with VMX instruction for long bytes comparision wei.guo.simon
2018-05-28 11:05   ` Segher Boessenkool
2018-05-30  8:14     ` Simon Guo
2018-05-30  8:35       ` Segher Boessenkool
2018-05-30  9:03         ` Simon Guo
2018-06-06  6:42           ` Simon Guo
2018-06-06 20:00             ` Segher Boessenkool
2018-05-28 11:59   ` Michael Ellerman
2018-05-30  8:15     ` Simon Guo
2018-05-25  4:07 ` [PATCH v6 3/4] powerpc/64: add 32 bytes prechecking before using VMX optimization on memcmp() wei.guo.simon
2018-05-25  4:07 ` [PATCH v6 4/4] powerpc:selftest update memcmp_64 selftest for VMX implementation wei.guo.simon

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