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From: Alexey Kardashevskiy <aik@ozlabs.ru>
To: Timothy Pearson <tpearson@raptorengineering.com>
Cc: linuxppc-dev@lists.ozlabs.org, Paul Mackerras <paulus@samba.org>
Subject: Re: [PATCH 6/7] powerpc/powernv/pci: Invalidate TCE cache after DMA map
Date: Mon, 25 Jun 2018 13:49:25 +1000	[thread overview]
Message-ID: <20180625134925.1371d933@aik.ozlabs.ibm.com> (raw)
In-Reply-To: <1298010887.2569253.1529798076885.JavaMail.zimbra@raptorengineeringinc.com>

On Sat, 23 Jun 2018 18:54:36 -0500 (CDT)
Timothy Pearson <tpearson@raptorengineering.com> wrote:

>  setup
> 
> Per the IODA2, TCEs must be invalidated after their settings
> have been changed.  Invalidate the cache after the address
> is changed during TCE allocation when using pseudo DMA.
> 
> Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
> ---
>  arch/powerpc/platforms/powernv/pci-dma.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/arch/powerpc/platforms/powernv/pci-dma.c b/arch/powerpc/platforms/powernv/pci-dma.c
> index 237940a2a052..060dbc168401 100644
> --- a/arch/powerpc/platforms/powernv/pci-dma.c
> +++ b/arch/powerpc/platforms/powernv/pci-dma.c
> @@ -42,8 +42,7 @@ static int dma_pseudo_bypass_select_tce(struct pnv_ioda_pe *pe, phys_addr_t addr
>  	new = cpu_to_be64(addr | TCE_PCI_READ | TCE_PCI_WRITE);
>  	pe->tces[tce] = new;
>  	mb();
> -	pe_info(pe, "allocating TCE %i 0x%016llx (old 0x%016llx)\n",
> -		tce, new, old);
> +	pnv_pci_ioda2_tce_invalidate_pe(pe);

This should be merged into "powerpc/powernv: DMA operations for
discontiguous" and "[PATCH 5/7] powerpc/powernv/pci: Export" should be
first in the series.


>  	spin_unlock_irqrestore(&pe->tce_alloc_lock, flags);
>  
>  	return tce;
> -- 
> 2.17.1



--
Alexey

      reply	other threads:[~2018-06-25  3:49 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-23 23:54 [PATCH 6/7] powerpc/powernv/pci: Invalidate TCE cache after DMA map Timothy Pearson
2018-06-25  3:49 ` Alexey Kardashevskiy [this message]

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