* [PATCH] powerpc/64s/radix: tlb do not flush on page size when fullmm
@ 2018-07-25 13:58 Nicholas Piggin
2018-07-25 14:17 ` Aneesh Kumar K.V
2018-08-08 14:25 ` Michael Ellerman
0 siblings, 2 replies; 3+ messages in thread
From: Nicholas Piggin @ 2018-07-25 13:58 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin, Aneesh Kumar K . V
When the mm is being torn down there will be a full PID flush so
there is no need to flush the TLB on page size changes.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/include/asm/tlb.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/include/asm/tlb.h b/arch/powerpc/include/asm/tlb.h
index 5d3107f2b014..d1b3dc4a6a0a 100644
--- a/arch/powerpc/include/asm/tlb.h
+++ b/arch/powerpc/include/asm/tlb.h
@@ -84,6 +84,9 @@ static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb,
unsigned int page_size)
{
+ if (tlb->fullmm)
+ return;
+
if (!tlb->page_size)
tlb->page_size = page_size;
else if (tlb->page_size != page_size) {
--
2.17.0
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] powerpc/64s/radix: tlb do not flush on page size when fullmm
2018-07-25 13:58 [PATCH] powerpc/64s/radix: tlb do not flush on page size when fullmm Nicholas Piggin
@ 2018-07-25 14:17 ` Aneesh Kumar K.V
2018-08-08 14:25 ` Michael Ellerman
1 sibling, 0 replies; 3+ messages in thread
From: Aneesh Kumar K.V @ 2018-07-25 14:17 UTC (permalink / raw)
To: Nicholas Piggin, linuxppc-dev; +Cc: Aneesh Kumar K . V, Nicholas Piggin
Nicholas Piggin <npiggin@gmail.com> writes:
> When the mm is being torn down there will be a full PID flush so
> there is no need to flush the TLB on page size changes.
and that tlb flush is PID flush since tlb->fulmm is set? So this avoids
multiple PID tlb flush.
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> arch/powerpc/include/asm/tlb.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/powerpc/include/asm/tlb.h b/arch/powerpc/include/asm/tlb.h
> index 5d3107f2b014..d1b3dc4a6a0a 100644
> --- a/arch/powerpc/include/asm/tlb.h
> +++ b/arch/powerpc/include/asm/tlb.h
> @@ -84,6 +84,9 @@ static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
> static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb,
> unsigned int page_size)
> {
> + if (tlb->fullmm)
> + return;
> +
> if (!tlb->page_size)
> tlb->page_size = page_size;
> else if (tlb->page_size != page_size) {
> --
> 2.17.0
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: powerpc/64s/radix: tlb do not flush on page size when fullmm
2018-07-25 13:58 [PATCH] powerpc/64s/radix: tlb do not flush on page size when fullmm Nicholas Piggin
2018-07-25 14:17 ` Aneesh Kumar K.V
@ 2018-08-08 14:25 ` Michael Ellerman
1 sibling, 0 replies; 3+ messages in thread
From: Michael Ellerman @ 2018-08-08 14:25 UTC (permalink / raw)
To: Nicholas Piggin, linuxppc-dev; +Cc: Aneesh Kumar K . V, Nicholas Piggin
On Wed, 2018-07-25 at 13:58:06 UTC, Nicholas Piggin wrote:
> When the mm is being torn down there will be a full PID flush so
> there is no need to flush the TLB on page size changes.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/5a6099346c41792f1ba23aea6f74ad
cheers
^ permalink raw reply [flat|nested] 3+ messages in thread
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2018-07-25 13:58 [PATCH] powerpc/64s/radix: tlb do not flush on page size when fullmm Nicholas Piggin
2018-07-25 14:17 ` Aneesh Kumar K.V
2018-08-08 14:25 ` Michael Ellerman
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