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From: Nicholas Piggin <npiggin@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: kvm-ppc@vger.kernel.org,
	"Gautham R . Shenoy" <ego@linux.vnet.ibm.com>,
	Mahesh Jagannath Salgaonkar <mahesh@linux.vnet.ibm.com>,
	"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>,
	Akshay Adiga <akshay.adiga@linux.vnet.ibm.com>
Subject: Re: [PATCH v2 2/2] powerpc/64s: reimplement book3s idle code in C
Date: Fri, 10 Aug 2018 17:11:46 +1000	[thread overview]
Message-ID: <20180810171146.48ce9fd1@roar.ozlabs.ibm.com> (raw)
In-Reply-To: <20180810064249.13724-2-npiggin@gmail.com>

On Fri, 10 Aug 2018 16:42:49 +1000
Nicholas Piggin <npiggin@gmail.com> wrote:

> Reimplement Book3S idle code in C, moving POWER7/8/9 implementation
> speific HV idle code to the powernv platform code.
> 
> Book3S assembly stubs are kept in common code and used only to save
> the stack frame and non-volatile GPRs before executing architected
> idle instructions, and restoring the stack and reloading GPRs then
> returning to C after waking from idle.
> 
> The complex logic dealing with threads and subcores, locking, SPRs,
> HMIs, timebase resync, etc., is all done in C which makes it more
> maintainable.
> 
> This is not a strict translation to C code, there are some
> significant differences:
> 
> - Idle wakeup no longer uses the ->cpu_restore call to reinit SPRs,
>   but saves and restores them itself.
> 
> - The optimisation where EC=ESL=0 idle modes did not have to save GPRs
>   or change MSR is restored, because it's now simple to do. ESL=1
>   sleeps that do not lose GPRs can use this optimization too.
> 
> - KVM secondary entry and cede is now more of a call/return style
>   rather than branchy. nap_state_lost is not required because KVM
>   always returns via NVGPR restoring path.
> 
> Reviewed-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> 
> Left to do:
> - KVM could use more review, it's pretty tricky. Not sure if what
>   I'm doing with the emergency stack is kosher. But it runs pretty fine
>   here with a POWER9 SMP+SMT guest. Possible to streamline

That should be POWER8. POWER9 radix on hash with dependent threads
mode also seems to work okay.

Thanks,
Nick

  reply	other threads:[~2018-08-10  7:11 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-10  6:42 [PATCH v2 1/2] powerpc/64s: move machine check SLB flushing to mm/slb.c Nicholas Piggin
2018-08-10  6:42 ` [PATCH v2 2/2] powerpc/64s: reimplement book3s idle code in C Nicholas Piggin
2018-08-10  7:11   ` Nicholas Piggin [this message]
2018-08-13  4:27 ` [PATCH v2 1/2] powerpc/64s: move machine check SLB flushing to mm/slb.c Mahesh Jagannath Salgaonkar
2018-08-13 14:41   ` Nicholas Piggin
2018-08-13 11:23 ` [v2, " Michael Ellerman

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