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[60.240.189.67]) by smtp.gmail.com with ESMTPSA id t22-v6sm652470pfk.141.2018.10.02.22.52.45 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 02 Oct 2018 22:52:48 -0700 (PDT) Date: Wed, 3 Oct 2018 15:52:43 +1000 From: Nicholas Piggin To: Christophe LEROY Subject: Re: [RFC PATCH v3 3/7] powerpc: Activate CONFIG_THREAD_INFO_IN_TASK Message-ID: <20181003155243.70806497@roar.ozlabs.ibm.com> In-Reply-To: References: <522887e5967b6619be34eb4f04565033dbed2d75.1538396658.git.christophe.leroy@c-s.fr> <20181003153025.35b2dd5e@roar.ozlabs.ibm.com> X-Mailer: Claws Mail 3.17.0 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, Paul Mackerras , aneesh.kumar@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Wed, 3 Oct 2018 07:47:05 +0200 Christophe LEROY wrote: > Le 03/10/2018 =C3=A0 07:30, Nicholas Piggin a =C3=A9crit=C2=A0: > > On Mon, 1 Oct 2018 12:30:23 +0000 (UTC) > > Christophe Leroy wrote: > > =20 > >> This patch activates CONFIG_THREAD_INFO_IN_TASK which > >> moves the thread_info into task_struct. > >> > >> Moving thread_info into task_struct has the following advantages: > >> - It protects thread_info from corruption in the case of stack > >> overflows. > >> - Its address is harder to determine if stack addresses are > >> leaked, making a number of attacks more difficult. > >> > >> This has the following consequences: > >> - thread_info is now located at the top of task_struct. =20 > >=20 > > "top"... I got confused for a minute thinking high address and > > wondering how you can change CURRENT_THREAD_INFO just to point > > to current :) =20 >=20 > Would 'beginning' be less confusing ? Yes, good idea. > >> @@ -83,7 +83,13 @@ int is_cpu_dead(unsigned int cpu); > >> /* 32-bit */ > >> extern int smp_hw_index[]; > >> =20 > >> -#define raw_smp_processor_id() (current_thread_info()->cpu) > >> +/* > >> + * This is particularly ugly: it appears we can't actually get the de= finition > >> + * of task_struct here, but we need access to the CPU this task is ru= nning on. > >> + * Instead of using task_struct we're using _TASK_CPU which is extrac= ted from > >> + * asm-offsets.h by kbuild to get the current processor ID. > >> + */ > >> +#define raw_smp_processor_id() (*(unsigned int*)((void*)current + _T= ASK_CPU)) =20 > >=20 > > This is clever but yes ugly. Can't you include asm-offsets.h? riscv > > seems to. =20 >=20 > riscv has a clean asm-offsets.h . Our's defines constant with the same=20 > name as those defined in other headers which are included in C files. So= =20 > including asm-offsets in C files does create conflicts like: >=20 > ./include/generated/asm-offsets.h:71:0: warning: "TASK_SIZE" redefined > #define TASK_SIZE -2147483648 /* TASK_SIZE */ > ./arch/powerpc/include/asm/processor.h:95:0: note: this is the location=20 > of the previous definition > #define TASK_SIZE (CONFIG_TASK_SIZE) >=20 > ./include/generated/asm-offsets.h:98:0: warning: "NSEC_PER_SEC" redefined > #define NSEC_PER_SEC 1000000000 /* NSEC_PER_SEC */ > ./include/linux/time64.h:36:0: note: this is the location of the=20 > previous definition > #define NSEC_PER_SEC 1000000000L >=20 > ./arch/powerpc/include/asm/nohash/32/pgtable.h:34:0: warning:=20 > "PGD_TABLE_SIZE" redefined > #define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE) > ./include/generated/asm-offsets.h:101:0: note: this is the location of=20 > the previous definition > #define PGD_TABLE_SIZE 256 /* PGD_TABLE_SIZE */ >=20 > ... Okay. >=20 > In v2, I had a patch to fix those redundancies=20 > (https://patchwork.ozlabs.org/patch/974363/) but I found it unconvenient. Because of merge conflicts, or you did not like the new names? Thanks, Nick