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From: Nicholas Piggin <npiggin@gmail.com>
To: Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@ozlabs.org
Subject: Re: [PATCH 3/3] powerpc/mm/64s: Only use slbfee on CPUs that support it
Date: Wed, 7 Nov 2018 10:20:46 +1000	[thread overview]
Message-ID: <20181107102046.204dbd8f@roar.ozlabs.ibm.com> (raw)
In-Reply-To: <20181106123709.940-3-mpe@ellerman.id.au>

On Tue,  6 Nov 2018 23:37:09 +1100
Michael Ellerman <mpe@ellerman.id.au> wrote:

> The slbfee instruction was only added in ISA 2.05 (Power6), it's not
> supported on older CPUs. We don't have a CPU feature for that ISA
> version though, so just use the ISA 2.06 feature flag.
> 
> Fixes: e15a4fea4dee ("powerpc/64s/hash: Add some SLB debugging tests")
> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

Ugh, thank for fixing all that up. Looks good.

Thanks,
Nick

> ---
>  arch/powerpc/mm/slb.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c
> index 457fd29448b1..b663a36f9ada 100644
> --- a/arch/powerpc/mm/slb.c
> +++ b/arch/powerpc/mm/slb.c
> @@ -66,6 +66,9 @@ static void assert_slb_presence(bool present, unsigned long ea)
>  
>  	WARN_ON_ONCE(mfmsr() & MSR_EE);
>  
> +	if (!cpu_has_feature(CPU_FTR_ARCH_206))
> +		return;
> +
>  	asm volatile(__PPC_SLBFEE_DOT(%0, %1) : "=r"(tmp) : "r"(ea) : "cr0");
>  
>  	WARN_ON(present == (tmp == 0));
> -- 
> 2.17.2
> 


  reply	other threads:[~2018-11-07  0:23 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-06 12:37 [PATCH 1/3] powerpc/mm/64s: Consolidate SLB assertions Michael Ellerman
2018-11-06 12:37 ` [PATCH 2/3] powerpc/mm/64s: Use PPC_SLBFEE macro Michael Ellerman
2018-11-06 12:37 ` [PATCH 3/3] powerpc/mm/64s: Only use slbfee on CPUs that support it Michael Ellerman
2018-11-07  0:20   ` Nicholas Piggin [this message]
2018-11-07 21:27 ` [1/3] powerpc/mm/64s: Consolidate SLB assertions Michael Ellerman

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