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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 13 Mar 2019 06:11:33 -0000 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x2D6BWgc60489902 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 13 Mar 2019 06:11:32 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8ECE211C04C; Wed, 13 Mar 2019 06:11:32 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 809AE11C050; Wed, 13 Mar 2019 06:11:31 +0000 (GMT) Received: from aks.ibm (unknown [9.124.35.29]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTPS; Wed, 13 Mar 2019 06:11:31 +0000 (GMT) Date: Wed, 13 Mar 2019 11:41:29 +0530 From: Akshay Adiga To: Michael Ellerman Subject: Re: [PATCH v4 2/9] powerpc/powernv/idle: Restore AMR/UAMOR/AMOR after idle References: <20190228144917.16876-1-mpe@ellerman.id.au> <20190228144917.16876-2-mpe@ellerman.id.au> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20190228144917.16876-2-mpe@ellerman.id.au> User-Agent: Mutt/1.10.1 (2018-07-13) X-TM-AS-GCONF: 00 x-cbid: 19031306-4275-0000-0000-0000031A5347 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19031306-4276-0000-0000-00003828C056 Message-Id: <20190313061129.GA4047@aks.ibm> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-13_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1011 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=642 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903130044 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@ozlabs.org, npiggin@gmail.com Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Fri, Mar 01, 2019 at 01:49:10AM +1100, Michael Ellerman wrote: > In order to implement KUAP (Kernel Userspace Access Protection) on > Power9 we will be using the AMR, and therefore indirectly the > UAMOR/AMOR. > > So save/restore these regs in the idle code. > > Signed-off-by: Michael Ellerman > --- > arch/powerpc/kernel/idle_book3s.S | 27 +++++++++++++++++++++++---- > 1 file changed, 23 insertions(+), 4 deletions(-) > > v4: New. > > diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S > index 36178000a2f2..4a860d3b9229 100644 > --- a/arch/powerpc/kernel/idle_book3s.S > +++ b/arch/powerpc/kernel/idle_book3s.S > @@ -170,8 +170,11 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300) > bne- core_idle_lock_held > blr > > -/* Reuse an unused pt_regs slot for IAMR */ > +/* Reuse some unused pt_regs slots for AMR/IAMR/UAMOR/UAMOR */ > +#define PNV_POWERSAVE_AMR _TRAP > #define PNV_POWERSAVE_IAMR _DAR > +#define PNV_POWERSAVE_UAMOR _DSISR > +#define PNV_POWERSAVE_AMOR RESULT > > /* > * Pass requested state in r3: > @@ -205,8 +208,16 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300) > SAVE_NVGPRS(r1) > > BEGIN_FTR_SECTION > + mfspr r4, SPRN_AMR > mfspr r5, SPRN_IAMR > + mfspr r6, SPRN_UAMOR > + std r4, PNV_POWERSAVE_AMR(r1) > std r5, PNV_POWERSAVE_IAMR(r1) > + std r6, PNV_POWERSAVE_UAMOR(r1) > +BEGIN_FTR_SECTION_NESTED(42) > + mfspr r7, SPRN_AMOR > + std r7, PNV_POWERSAVE_AMOR(r1) > +END_FTR_SECTION_NESTED_IFSET(CPU_FTR_HVMODE, 42) > END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) Can we save/restore for ARCH_300S only ? I checked the user manual "POWER8 Processor User’s Manual for the Single-Chip Module" v1.3 dated 16 March 2016. In section 9.7.2.2, It mentions that AMOR and UAMOR will be preserved by hardware. Excrept : " When an SMT thread switch is enabled, the napping thread’s resources can be given to other threads to improve core performance. Software must restore the architected state of the dormant thread upon exiting nap mode except for the following architected facilities, which are preserved by the hardware: - SLB State - All Hypervisor Special Registers (includes PURR, SPURR, AMOR, UAMOR, AMR, ACOP) " Keeping 207S has no harm, its just that we may spend a few more cycles saving and restoring the sprs. > > mfcr r5 > @@ -935,12 +946,20 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) > REST_GPR(2, r1) > > BEGIN_FTR_SECTION > - /* IAMR was saved in pnv_powersave_common() */ > + /* These regs were saved in pnv_powersave_common() */ > + ld r4, PNV_POWERSAVE_AMR(r1) > ld r5, PNV_POWERSAVE_IAMR(r1) > + ld r6, PNV_POWERSAVE_UAMOR(r1) > + mtspr SPRN_AMR, r4 > mtspr SPRN_IAMR, r5 > + mtspr SPRN_UAMOR, r6 > +BEGIN_FTR_SECTION_NESTED(42) > + ld r7, PNV_POWERSAVE_AMOR(r1) > + mtspr SPRN_AMOR, r7 > +END_FTR_SECTION_NESTED_IFSET(CPU_FTR_HVMODE, 42) > /* > - * We don't need an isync here because the upcoming mtmsrd is > - * execution synchronizing. > + * We don't need an isync here after restoring IAMR because the upcoming > + * mtmsrd is execution synchronizing. > */ > END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) > > -- > 2.20.1 >