From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.6 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D036C10F03 for ; Tue, 23 Apr 2019 21:04:03 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B71D8208E4 for ; Tue, 23 Apr 2019 21:04:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="W9aNWgTM" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B71D8208E4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 44pbXc5Q0kzDqLV for ; Wed, 24 Apr 2019 07:04:00 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::641; helo=mail-pl1-x641.google.com; envelope-from=changbin.du@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="W9aNWgTM"; dkim-atps=neutral Received: from mail-pl1-x641.google.com (mail-pl1-x641.google.com [IPv6:2607:f8b0:4864:20::641]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 44pTdQ5MzmzDq5b for ; Wed, 24 Apr 2019 02:37:46 +1000 (AEST) Received: by mail-pl1-x641.google.com with SMTP id o7so5547794pll.13 for ; Tue, 23 Apr 2019 09:37:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=G+5WsbuuHSwf0oNxPHkpZsl8HtDzIrn5jcvXnz9HzZI=; b=W9aNWgTM8EbN+mC6b34M7J0nnY27HqdhHi7nZRkn7BjXXLahzO2l5wEhrmsjSQn7k/ Yxsa6sdPKpEMYBS1yMJ0rWKGWzt8vBcW/7enYQ63n4LNQRKRuN5IBEM3aCxtvwwY7dLG ZDaEyV8CX9w1zNClkWW3jaMw5+E0CEDzQz4n/WRSrOlXua4KTH0y3QrJ+k8n8auyIJCY MaiLjGf/SvRc5Pn83A6pvkqlyhIYJFTK5l0J0noF3FfizqPm1nnAEIhL4hmk2MVZnmyD 79bpzgo5UrYzLf4tGv9Af1GWzTLJHp75Vi+uap9jM+nCzhhyT8UdyeEHkhCCeCJt4wud YYFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=G+5WsbuuHSwf0oNxPHkpZsl8HtDzIrn5jcvXnz9HzZI=; b=Xa9zNQ98L7mnBkLqqr36bqFi5hZlbka/x66XSVhU4vXRhWVIigAs7dHbygBY5wh6c6 PLWLRWFAowSO+HB91kFtB5eif7kxwUWtG9qv1VJzfDmN3l1PchLo+zKToMEXnktIo4BL 6b+XnJRgBBqoHOIx4Lh9Kzskn4fmJ0AUT9GEIpQTFKTaXF5Hagyaq2Zy74G8SRiWvN+d 48W5CFtLtYXSUBryFlW+6ebEeaBigmYf90hj9rVMZXCKoAwjvozwC8atrRv02KGPkY9G RXPW97RaCWFy1OKhebgQE+De4Ejf3fKzuObbbjaVJPXqY6+x+92ZEosRh8EwT7pRk485 +Eqw== X-Gm-Message-State: APjAAAWV3DzfHmZESURauDDsZLZZKw9IHpRSak2tuBhKVKW0IVSCTf8W 1OzB77WyMrqJ3C6XRxJGO1Y= X-Google-Smtp-Source: APXvYqyDAYH7RKDhGTJRRH30tHOaxD9N9waBQO86dyj+4f4wEhsTTWbXAFeIVvpfM0LsQGX1daL5kQ== X-Received: by 2002:a17:902:7294:: with SMTP id d20mr19674924pll.300.1556037464729; Tue, 23 Apr 2019 09:37:44 -0700 (PDT) Received: from localhost.localdomain ([104.238.181.70]) by smtp.gmail.com with ESMTPSA id v1sm24364801pff.81.2019.04.23.09.37.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 23 Apr 2019 09:37:43 -0700 (PDT) From: Changbin Du To: Jonathan Corbet Subject: [PATCH v4 45/63] Documentation: x86: convert tlb.txt to reST Date: Wed, 24 Apr 2019 00:29:14 +0800 Message-Id: <20190423162932.21428-46-changbin.du@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190423162932.21428-1-changbin.du@gmail.com> References: <20190423162932.21428-1-changbin.du@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Mailman-Approved-At: Wed, 24 Apr 2019 05:41:32 +1000 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fenghua.yu@intel.com, mchehab+samsung@kernel.org, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-gpio@vger.kernel.org, x86@kernel.org, rjw@rjwysocki.net, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, mingo@redhat.com, Bjorn Helgaas , tglx@linutronix.de, linuxppc-dev@lists.ozlabs.org, Changbin Du Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" This converts the plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Changbin Du --- Documentation/x86/index.rst | 1 + Documentation/x86/{tlb.txt => tlb.rst} | 30 ++++++++++++++++---------- 2 files changed, 20 insertions(+), 11 deletions(-) rename Documentation/x86/{tlb.txt => tlb.rst} (81%) diff --git a/Documentation/x86/index.rst b/Documentation/x86/index.rst index 9a0b5f38ef6b..fd54b859db9b 100644 --- a/Documentation/x86/index.rst +++ b/Documentation/x86/index.rst @@ -15,3 +15,4 @@ Linux x86 Support entry_64 earlyprintk zero-page + tlb diff --git a/Documentation/x86/tlb.txt b/Documentation/x86/tlb.rst similarity index 81% rename from Documentation/x86/tlb.txt rename to Documentation/x86/tlb.rst index 6a0607b99ed8..82ec58ae63a8 100644 --- a/Documentation/x86/tlb.txt +++ b/Documentation/x86/tlb.rst @@ -1,5 +1,12 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======= +The TLB +======= + When the kernel unmaps or modified the attributes of a range of memory, it has two choices: + 1. Flush the entire TLB with a two-instruction sequence. This is a quick operation, but it causes collateral damage: TLB entries from areas other than the one we are trying to flush will be @@ -10,6 +17,7 @@ memory, it has two choices: damage to other TLB entries. Which method to do depends on a few things: + 1. The size of the flush being performed. A flush of the entire address space is obviously better performed by flushing the entire TLB than doing 2^48/PAGE_SIZE individual flushes. @@ -33,7 +41,7 @@ well. There is essentially no "right" point to choose. You may be doing too many individual invalidations if you see the invlpg instruction (or instructions _near_ it) show up high in profiles. If you believe that individual invalidations being -called too often, you can lower the tunable: +called too often, you can lower the tunable:: /sys/kernel/debug/x86/tlb_single_page_flush_ceiling @@ -43,7 +51,7 @@ Setting it to 1 is a very conservative setting and it should never need to be 0 under normal circumstances. Despite the fact that a single individual flush on x86 is -guaranteed to flush a full 2MB [1], hugetlbfs always uses the full +guaranteed to flush a full 2MB [1]_, hugetlbfs always uses the full flushes. THP is treated exactly the same as normal memory. You might see invlpg inside of flush_tlb_mm_range() show up in @@ -54,15 +62,15 @@ Essentially, you are balancing the cycles you spend doing invlpg with the cycles that you spend refilling the TLB later. You can measure how expensive TLB refills are by using -performance counters and 'perf stat', like this: +performance counters and 'perf stat', like this:: -perf stat -e - cpu/event=0x8,umask=0x84,name=dtlb_load_misses_walk_duration/, - cpu/event=0x8,umask=0x82,name=dtlb_load_misses_walk_completed/, - cpu/event=0x49,umask=0x4,name=dtlb_store_misses_walk_duration/, - cpu/event=0x49,umask=0x2,name=dtlb_store_misses_walk_completed/, - cpu/event=0x85,umask=0x4,name=itlb_misses_walk_duration/, - cpu/event=0x85,umask=0x2,name=itlb_misses_walk_completed/ + perf stat -e + cpu/event=0x8,umask=0x84,name=dtlb_load_misses_walk_duration/, + cpu/event=0x8,umask=0x82,name=dtlb_load_misses_walk_completed/, + cpu/event=0x49,umask=0x4,name=dtlb_store_misses_walk_duration/, + cpu/event=0x49,umask=0x2,name=dtlb_store_misses_walk_completed/, + cpu/event=0x85,umask=0x4,name=itlb_misses_walk_duration/, + cpu/event=0x85,umask=0x2,name=itlb_misses_walk_completed/ That works on an IvyBridge-era CPU (i5-3320M). Different CPUs may have differently-named counters, but they should at least @@ -70,6 +78,6 @@ be there in some form. You can use pmu-tools 'ocperf list' (https://github.com/andikleen/pmu-tools) to find the right counters for a given CPU. -1. A footnote in Intel's SDM "4.10.4.2 Recommended Invalidation" +.. [1] A footnote in Intel's SDM "4.10.4.2 Recommended Invalidation" says: "One execution of INVLPG is sufficient even for a page with size greater than 4 KBytes." -- 2.20.1