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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 7 May 2019 15:14:02 +0100 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x47EE0Sq24248506 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 7 May 2019 14:14:00 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A9DEEA4069; Tue, 7 May 2019 14:14:00 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 04BFEA4059; Tue, 7 May 2019 14:13:59 +0000 (GMT) Received: from in.ibm.com (unknown [9.102.3.43]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTPS; Tue, 7 May 2019 14:13:58 +0000 (GMT) Date: Tue, 7 May 2019 19:43:56 +0530 From: Mahesh J Salgaonkar To: Hari Bathini Subject: Re: [PATCH v2 09/16] powernv/fadump: process architected register state data provided by firmware References: <155541065470.812.7120798773144842076.stgit@hbathini.in.ibm.com> <155541089317.812.14447001298006010972.stgit@hbathini.in.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <155541089317.812.14447001298006010972.stgit@hbathini.in.ibm.com> User-Agent: NeoMutt/20180716 X-TM-AS-GCONF: 00 x-cbid: 19050714-0016-0000-0000-00000279390C X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19050714-0017-0000-0000-000032D5E359 Message-Id: <20190507141356.saug5kjhntwozu76@in.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-07_08:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1905070092 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: mahesh@linux.vnet.ibm.com Cc: Ananth N Mavinakayanahalli , Mahesh J Salgaonkar , Vasant Hegde , linuxppc-dev , Nicholas Piggin , Stewart Smith , Daniel Axtens Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On 2019-04-16 16:05:06 Tue, Hari Bathini wrote: > From: Hari Bathini > > Firmware provides architected register state data at the time of crash. > Process this data and build CPU notes to append to ELF core. > > Signed-off-by: Hari Bathini > Signed-off-by: Vasant Hegde > --- > > Changes in v2: > * Updated reg type values according to recent OPAL changes > > > arch/powerpc/include/asm/opal-api.h | 23 +++ > arch/powerpc/kernel/fadump-common.h | 3 > arch/powerpc/platforms/powernv/opal-fadump.c | 187 ++++++++++++++++++++++++-- > arch/powerpc/platforms/powernv/opal-fadump.h | 4 + > 4 files changed, 206 insertions(+), 11 deletions(-) > > diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h > index 75471c2..91f2735 100644 > --- a/arch/powerpc/include/asm/opal-api.h > +++ b/arch/powerpc/include/asm/opal-api.h > @@ -976,6 +976,29 @@ struct opal_sg_list { > * Firmware-Assisted Dump (FADump) > */ > > +/* FADump thread header for register entries */ > +struct opal_fadump_thread_hdr { > + __be32 pir; > + /* 0x00 - 0x0F - The corresponding stop state of the core */ > + u8 core_state; > + u8 reserved[3]; > + > + __be32 offset; /* Offset to Register Entries array */ > + __be32 ecnt; /* Number of entries */ > + __be32 esize; /* Alloc size of each array entry in bytes */ > + __be32 eactsz; /* Actual size of each array entry in bytes */ > +} __packed; > + > +#define OPAL_REG_TYPE_GPR 0x01 > +#define OPAL_REG_TYPE_SPR 0x02 > + > +/* FADump register entry. */ > +struct opal_fadump_reg_entry { > + __be32 reg_type; > + __be32 reg_num; > + __be64 reg_val; > +}; > + > /* The maximum number of dump sections supported by OPAL */ > #define OPAL_FADUMP_NR_SECTIONS 64 > > diff --git a/arch/powerpc/kernel/fadump-common.h b/arch/powerpc/kernel/fadump-common.h > index ff764d4..8d47382 100644 > --- a/arch/powerpc/kernel/fadump-common.h > +++ b/arch/powerpc/kernel/fadump-common.h > @@ -117,6 +117,9 @@ struct fadump_memory_range { > > /* Firmware-assisted dump configuration details. */ > struct fw_dump { > + unsigned long cpu_state_destination_addr; > + unsigned long cpu_state_data_version; > + unsigned long cpu_state_entry_size; > unsigned long cpu_state_data_size; > unsigned long hpte_region_size; > unsigned long boot_memory_size; > diff --git a/arch/powerpc/platforms/powernv/opal-fadump.c b/arch/powerpc/platforms/powernv/opal-fadump.c > index da8480d..853f663 100644 > --- a/arch/powerpc/platforms/powernv/opal-fadump.c > +++ b/arch/powerpc/platforms/powernv/opal-fadump.c > @@ -94,6 +94,12 @@ static void update_fadump_config(struct fw_dump *fadump_conf, > > last_end = base + size; > j++; > + } else if (fdm->section[i].src_type == > + OPAL_FADUMP_CPU_STATE_DATA) { > + fadump_conf->cpu_state_destination_addr = > + be64_to_cpu(fdm->section[i].dest_addr); > + fadump_conf->cpu_state_data_size = > + be64_to_cpu(fdm->section[i].dest_size); > } > } > fadump_conf->rmr_regions_cnt = j; > @@ -199,6 +205,75 @@ static int opal_invalidate_fadump(struct fw_dump *fadump_conf) > return 0; > } > > +static inline void fadump_set_regval_regnum(struct pt_regs *regs, u32 reg_type, > + u32 reg_num, u64 reg_val) > +{ > + if (reg_type == OPAL_REG_TYPE_GPR) { > + if (reg_num < 32) > + regs->gpr[reg_num] = reg_val; > + return; > + } > + > + switch (reg_num) { > + case 2000: > + regs->nip = reg_val; > + break; > + case 2001: > + regs->msr = reg_val; > + break; > + case 9: > + regs->ctr = reg_val; > + break; > + case 8: > + regs->link = reg_val; > + break; > + case 1: > + regs->xer = reg_val; > + break; > + case 2002: > + regs->ccr = reg_val; > + break; > + case 19: > + regs->dar = reg_val; > + break; > + case 18: > + regs->dsisr = reg_val; > + break; Can we use SPRN_* #defines which are already present in asm/reg.h instead of hard coding numbers for switch cases ? You may want to add new #defines for NIP, MSR and CCR. Thanks, -Mahesh.