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[216.228.112.22]) by smtp.gmail.com with ESMTPSA id 10sm93476pfh.179.2019.06.05.17.16.43 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 05 Jun 2019 17:16:44 -0700 (PDT) Date: Wed, 5 Jun 2019 17:16:45 -0700 From: Nicolin Chen To: "S.j. Wang" Subject: Re: [PATCH] ASoC: fsl_esai: fix the channel swap issue after xrun Message-ID: <20190606001644.GA20103@Asurada-Nvidia.nvidia.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "alsa-devel@alsa-project.org" , "timur@kernel.org" , "Xiubo.Lee@gmail.com" , "festevam@gmail.com" , "linux-kernel@vger.kernel.org" , "broonie@kernel.org" , "linuxppc-dev@lists.ozlabs.org" Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Hello Shengjiu, On Wed, Jun 05, 2019 at 10:29:37AM +0000, S.j. Wang wrote: > > > ETDR is not volatile, if we mark it is volatile, is it correct? > > > > Well, you have a point -- it might not be ideally true, but it sounds like a > > correct fix to me according to this comments. > > > > We can wait for Mark's comments or just send a patch to the mail list for > > review. > > I test this patch, we don't need to reset the FIFO, and regcache_sync didn't > Write the ETDR even the EDTR is not volatile. This fault maybe caused by The fsl_esai driver uses FLAT type cache so regcache_sync() would go through regcache_default_sync() that would bypass cache sync at the regcache_reg_needs_sync() check when the cached register value matches its default value: in case of ETDR who has a default value 0x0, it'd just "continue" without doing that _regmap_write() when the cached value equals to 0x0. > Legacy, in the beginning we add this patch in internal branch, there maybe > Something cause this issue, but now can't reproduced. The "legacy" case might happen to have two mismatched ETDR values between the cached value and default 0x0. And I am worried it may appear once again someday. So I feel we still need to change ETDR to volatile type. And for your question "ETDR is not volatile, if we mark it is volatile, is it correct?", I double checked the definition of volatile_reg, and it says: * @volatile_reg: Optional callback returning true if the register * value can't be cached. If this field is NULL but So it seems correct to me then, as the "volatile" should be also transcribed as "non-cacheable". Thanks Nicolin