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From: Nicholas Piggin <npiggin@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: Nicholas Piggin <npiggin@gmail.com>
Subject: [PATCH v3 08/13] powerpc/64s/exception: use common macro for windup
Date: Fri, 28 Jun 2019 15:33:27 +1000	[thread overview]
Message-ID: <20190628053332.22366-9-npiggin@gmail.com> (raw)
In-Reply-To: <20190628053332.22366-1-npiggin@gmail.com>

No generated code change.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 arch/powerpc/kernel/exceptions-64s.S | 112 +++++++++------------------
 1 file changed, 36 insertions(+), 76 deletions(-)

diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 228fa51b9050..2b3a7d928df6 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -424,6 +424,38 @@ END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66);			   \
 	EXCEPTION_PROLOG_COMMON_2(area);			\
 	EXCEPTION_PROLOG_COMMON_3(trap)
 
+/*
+ * Restore all registers including H/SRR0/1 saved in a stack frame of a
+ * standard exception.
+ */
+.macro EXCEPTION_RESTORE_REGS hsrr
+	/* Move original SRR0 and SRR1 into the respective regs */
+	ld	r9,_MSR(r1)
+	.if \hsrr
+	mtspr	SPRN_HSRR1,r9
+	.else
+	mtspr	SPRN_SRR1,r9
+	.endif
+	ld	r9,_NIP(r1)
+	.if \hsrr
+	mtspr	SPRN_HSRR0,r9
+	.else
+	mtspr	SPRN_SRR0,r9
+	.endif
+	ld	r9,_CTR(r1)
+	mtctr	r9
+	ld	r9,_XER(r1)
+	mtxer	r9
+	ld	r9,_LINK(r1)
+	mtlr	r9
+	ld	r9,_CCR(r1)
+	mtcr	r9
+	REST_8GPRS(2, r1)
+	REST_4GPRS(10, r1)
+	REST_GPR(0, r1)
+	/* restore original r1. */
+	ld	r1,GPR1(r1)
+.endm
 
 #define RUNLATCH_ON				\
 BEGIN_FTR_SECTION				\
@@ -901,29 +933,7 @@ EXC_COMMON_BEGIN(system_reset_common)
 	ld	r10,SOFTE(r1)
 	stb	r10,PACAIRQSOFTMASK(r13)
 
-	/*
-	 * Keep below code in synch with MACHINE_CHECK_HANDLER_WINDUP.
-	 * Should share common bits...
-	 */
-
-	/* Move original SRR0 and SRR1 into the respective regs */
-	ld	r9,_MSR(r1)
-	mtspr	SPRN_SRR1,r9
-	ld	r9,_NIP(r1)
-	mtspr	SPRN_SRR0,r9
-	ld	r9,_CTR(r1)
-	mtctr	r9
-	ld	r9,_XER(r1)
-	mtxer	r9
-	ld	r9,_LINK(r1)
-	mtlr	r9
-	ld	r9,_CCR(r1)
-	mtcr	r9
-	REST_8GPRS(2, r1)
-	REST_4GPRS(10, r1)
-	REST_GPR(0, r1)
-	/* restore original r1. */
-	ld	r1,GPR1(r1)
+	EXCEPTION_RESTORE_REGS EXC_STD
 	RFI_TO_USER_OR_KERNEL
 
 #ifdef CONFIG_PPC_PSERIES
@@ -1082,24 +1092,7 @@ EXC_COMMON_BEGIN(machine_check_common)
 	lhz	r12,PACA_IN_MCE(r13);			\
 	subi	r12,r12,1;				\
 	sth	r12,PACA_IN_MCE(r13);			\
-	/* Move original SRR0 and SRR1 into the respective regs */	\
-	ld	r9,_MSR(r1);				\
-	mtspr	SPRN_SRR1,r9;				\
-	ld	r9,_NIP(r1);				\
-	mtspr	SPRN_SRR0,r9;				\
-	ld	r9,_CTR(r1);				\
-	mtctr	r9;					\
-	ld	r9,_XER(r1);				\
-	mtxer	r9;					\
-	ld	r9,_LINK(r1);				\
-	mtlr	r9;					\
-	ld	r9,_CCR(r1);				\
-	mtcr	r9;					\
-	REST_8GPRS(2, r1);				\
-	REST_4GPRS(10, r1);				\
-	REST_GPR(0, r1);				\
-	/* restore original r1. */			\
-	ld	r1,GPR1(r1)
+	EXCEPTION_RESTORE_REGS EXC_STD
 
 #ifdef CONFIG_PPC_P7_NAP
 /*
@@ -1779,48 +1772,15 @@ TRAMP_REAL_BEGIN(hmi_exception_early)
 	cmpdi	cr0,r3,0
 	bne	1f
 
-	/* Windup the stack. */
-	/* Move original HSRR0 and HSRR1 into the respective regs */
-	ld	r9,_MSR(r1)
-	mtspr	SPRN_HSRR1,r9
-	ld	r9,_NIP(r1)
-	mtspr	SPRN_HSRR0,r9
-	ld	r9,_CTR(r1)
-	mtctr	r9
-	ld	r9,_XER(r1)
-	mtxer	r9
-	ld	r9,_LINK(r1)
-	mtlr	r9
-	ld	r9,_CCR(r1)
-	mtcr	r9
-	REST_8GPRS(2, r1)
-	REST_4GPRS(10, r1)
-	REST_GPR(0, r1)
-	ld	r1,GPR1(r1)
+	EXCEPTION_RESTORE_REGS EXC_HV
 	HRFI_TO_USER_OR_KERNEL
 
 1:
-	ld	r9,_MSR(r1)
-	mtspr	SPRN_HSRR1,r9
-	ld	r9,_NIP(r1)
-	mtspr	SPRN_HSRR0,r9
-	ld	r9,_CTR(r1)
-	mtctr	r9
-	ld	r9,_XER(r1)
-	mtxer	r9
-	ld	r9,_LINK(r1)
-	mtlr	r9
-	ld	r9,_CCR(r1)
-	mtcr	r9
-	REST_8GPRS(2, r1)
-	REST_4GPRS(10, r1)
-	REST_GPR(0, r1)
-	ld	r1,GPR1(r1)
-
 	/*
 	 * Go to virtual mode and pull the HMI event information from
 	 * firmware.
 	 */
+	EXCEPTION_RESTORE_REGS EXC_HV
 	SET_SCRATCH0(r13)
 	EXCEPTION_PROLOG_0 PACA_EXGEN
 	b	tramp_real_hmi_exception
-- 
2.20.1


  parent reply	other threads:[~2019-06-28  5:47 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-28  5:33 [PATCH v3 00/13] next batch of interrupt handler improvements Nicholas Piggin
2019-06-28  5:33 ` [PATCH v3 01/13] powerpc/64s/exception: clean up system call entry Nicholas Piggin
2019-07-04 15:52   ` Michael Ellerman
2019-06-28  5:33 ` [PATCH v3 02/13] powerpc/64s/exception: avoid SPR RAW scoreboard stall in real mode entry Nicholas Piggin
2019-06-28  5:33 ` [PATCH v3 03/13] powerpc/64s/exception: mtmsrd L=1 cleanup Nicholas Piggin
2019-06-28  5:33 ` [PATCH v3 04/13] powerpc/64s/exception: windup use r9 consistently to restore SPRs Nicholas Piggin
2019-06-28  5:33 ` [PATCH v3 05/13] powerpc/64s/exception: move machine check windup in_mce handling Nicholas Piggin
2019-06-28  5:33 ` [PATCH v3 06/13] powerpc/64s/exception: simplify hmi windup code Nicholas Piggin
2019-06-28  5:33 ` [PATCH v3 07/13] powerpc/64s/exception: shuffle windup code around Nicholas Piggin
2019-06-28  5:33 ` Nicholas Piggin [this message]
2019-06-28  5:33 ` [PATCH v3 09/13] powerpc/64s/exception: add dar and dsisr options to exception macro Nicholas Piggin
2019-06-28  5:33 ` [PATCH v3 10/13] powerpc/64s/exception: machine check use standard macros to save dar/dsisr Nicholas Piggin
2019-06-28  5:33 ` [PATCH v3 11/13] powerpc/64s/exception: denorm handler use standard scratch save macro Nicholas Piggin
2019-06-28  5:33 ` [PATCH v3 12/13] powerpc/64s/exception: move SET_SCRATCH0 into EXCEPTION_PROLOG_0 Nicholas Piggin
2019-06-28  5:33 ` [PATCH v3 13/13] powerpc/tm: update comment about interrupt re-entrancy Nicholas Piggin

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