From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB454C3A59B for ; Mon, 19 Aug 2019 05:25:48 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 33F6121852 for ; Mon, 19 Aug 2019 05:25:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 33F6121852 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=lst.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 46Bj7Y5dJ0zDr7x for ; Mon, 19 Aug 2019 15:25:45 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lst.de (client-ip=213.95.11.211; helo=verein.lst.de; envelope-from=hch@lst.de; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=lst.de Received: from verein.lst.de (verein.lst.de [213.95.11.211]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 46Bj5G0hzDzDqnR for ; Mon, 19 Aug 2019 15:23:45 +1000 (AEST) Received: by verein.lst.de (Postfix, from userid 2407) id 736F768B02; Mon, 19 Aug 2019 07:23:37 +0200 (CEST) Date: Mon, 19 Aug 2019 07:23:37 +0200 From: Christoph Hellwig To: Rob Clark Subject: Re: [PATCH 0/6] drm+dma: cache support for arm, etc Message-ID: <20190819052337.GA16622@lst.de> References: <20190814220011.26934-1-robdclark@gmail.com> <20190815065117.GA23761@lst.de> <20190815175346.GA19839@lst.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.17 (2007-11-01) X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kate Stewart , Masayoshi Mizuma , "Maciej W. Rozycki" , Eric Biggers , Catalin Marinas , Imre Deak , dri-devel , Chris Wilson , Masahiro Yamada , Benjamin Gaignard , Mauro Carvalho Chehab , Will Deacon , Christoph Hellwig , Emil Velikov , Deepak Sharma , Paul Burton , Mike Rapoport , Geert Uytterhoeven , "moderated list:ARM64 PORT \(AARCH64 ARCHITECTURE\)" , Daniel Vetter , "open list:MIPS" , Linus Walleij , Robin Murphy , "open list:DRM DRIVER FOR MSM ADRENO GPU" , Joerg Roedel , Arnd Bergmann , Anshuman Khandual , Hauke Mehrtens , Jesper Dangaard Brouer , "Wolfram Sang \(Renesas\)" , "open list:LINUX FOR POWERPC \(32-BIT AND 64-BIT\)" , Alexios Zavras , Russell King , Doug Anderson , Thomas Gleixner , Sean Paul , Allison Randal , Enrico Weigelt , Ard Biesheuvel , Greg Kroah-Hartman , open list , Rob Clark , Souptick Joarder , Andrew Morton , "open list:DRM DRIVER FOR MSM ADRENO GPU" , christian.koenig@amd.com Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Fri, Aug 16, 2019 at 02:04:35PM -0700, Rob Clark wrote: > I don't disagree about needing an API to get uncached memory (or > ideally just something outside of the linear map). But I think this > is a separate problem. > > What I was hoping for, for v5.4, is a way to stop abusing dma_map/sync > for cache ops to get rid of the hack I had to make for v5.3. And also > to fix vgem on non-x86. (Unfortunately changing vgem to used cached > mappings breaks x86 CI, but fixes CI on arm/arm64..) We can do that > without any changes in allocation. There is still the possibility for > problems due to cached alias, but that has been a problem this whole > time, it isn't something new. But that just means we start exposing random low-level APIs that people will quickly abuse.. In fact even your simple plan to some extent already is an abuse of the intent of these functions, and it also requires a lot of knowledge in the driver that in the normal cases drivers can't know (e.g. is the device dma coherent or not).