From: Nicholas Piggin <npiggin@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: Nicholas Piggin <npiggin@gmail.com>
Subject: [PATCH 05/10] powerpc/64s/exception: remove confusing IEARLY option
Date: Wed, 21 Aug 2019 22:23:10 +1000 [thread overview]
Message-ID: <20190821122315.9535-6-npiggin@gmail.com> (raw)
In-Reply-To: <20190821122315.9535-1-npiggin@gmail.com>
Replace IEARLY=1 and IEARLY=2 with IBRANCH_COMMON, which controls if
the entry code branches to a common handler; and IREALMODE_COMMON,
which controls whether the common handler should remain in real mode.
These special cases no longer avoid loading the SRR registers, there
is no point as most of them load the registers immediately anyway.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/kernel/exceptions-64s.S | 48 ++++++++++++++--------------
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index e5d5d81d6107..705cca95e03c 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -174,7 +174,8 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
#define IDAR .L_IDAR_\name\()
#define IDSISR .L_IDSISR_\name\()
#define ISET_RI .L_ISET_RI_\name\()
-#define IEARLY .L_IEARLY_\name\()
+#define IBRANCH_COMMON .L_IBRANCH_COMMON_\name\()
+#define IREALMODE_COMMON .L_IREALMODE_COMMON_\name\()
#define IMASK .L_IMASK_\name\()
#define IKVM_SKIP .L_IKVM_SKIP_\name\()
#define IKVM_REAL .L_IKVM_REAL_\name\()
@@ -218,8 +219,15 @@ do_define_int n
.ifndef ISET_RI
ISET_RI=1
.endif
- .ifndef IEARLY
- IEARLY=0
+ .ifndef IBRANCH_COMMON
+ IBRANCH_COMMON=1
+ .endif
+ .ifndef IREALMODE_COMMON
+ IREALMODE_COMMON=0
+ .else
+ .if ! IBRANCH_COMMON
+ .error "IREALMODE_COMMON=1 but IBRANCH_COMMON=0"
+ .endif
.endif
.ifndef IMASK
IMASK=0
@@ -356,6 +364,11 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
#define GEN_OOL 1
.macro GEN_BRANCH_TO_COMMON name virt
+ .if IREALMODE_COMMON
+ LOAD_HANDLER(r10, \name\()_common)
+ mtctr r10
+ bctr
+ .else
.if \virt
#ifndef CONFIG_RELOCATABLE
b \name\()_common_virt
@@ -369,6 +382,7 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
mtctr r10
bctr
.endif
+ .endif
.endm
.macro GEN_INT_ENTRY name virt ool=0
@@ -424,11 +438,6 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
stw r10,IAREA+EX_DSISR(r13)
.endif
- .if IEARLY == 2
- /* nothing more */
- .elseif IEARLY
- BRANCH_TO_C000(r11, \name\()_common)
- .else
.if IHSRR == EXC_HV_OR_STD
BEGIN_FTR_SECTION
mfspr r11,SPRN_HSRR0 /* save HSRR0 */
@@ -444,6 +453,8 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
mfspr r11,SPRN_SRR0 /* save SRR0 */
mfspr r12,SPRN_SRR1 /* and SRR1 */
.endif
+
+ .if IBRANCH_COMMON
GEN_BRANCH_TO_COMMON \name \virt
.endif
@@ -923,6 +934,7 @@ INT_DEFINE_BEGIN(machine_check_early)
IHSRR=EXC_STD
IAREA=PACA_EXMC
IVIRT=0 /* no virt entry point */
+ IREALMODE_COMMON=1
/*
* MSR_RI is not enabled, because PACA_EXMC is being used, so a
* nested machine check corrupts it. machine_check_common enables
@@ -930,7 +942,6 @@ INT_DEFINE_BEGIN(machine_check_early)
*/
ISET_RI=0
ISTACK=0
- IEARLY=1
IDAR=1
IDSISR=1
IRECONCILE=0
@@ -971,9 +982,6 @@ TRAMP_REAL_BEGIN(machine_check_fwnmi)
EXCEPTION_RESTORE_REGS EXC_STD
EXC_COMMON_BEGIN(machine_check_early_common)
- mfspr r11,SPRN_SRR0
- mfspr r12,SPRN_SRR1
-
/*
* Switch to mc_emergency stack and handle re-entrancy (we limit
* the nested MCE upto level 4 to avoid stack overflow).
@@ -1849,7 +1857,7 @@ INT_DEFINE_BEGIN(hmi_exception_early)
IHSRR=EXC_HV
IAREA=PACA_EXGEN
IVIRT=0 /* no virt entry point */
- IEARLY=1
+ IREALMODE_COMMON=1
ISTACK=0
IRECONCILE=0
IKUAP=0 /* We don't touch AMR here, we never go to virtual mode */
@@ -1871,8 +1879,6 @@ EXC_REAL_END(hmi_exception, 0xe60, 0x20)
EXC_VIRT_NONE(0x4e60, 0x20)
EXC_COMMON_BEGIN(hmi_exception_early_common)
- mfspr r11,SPRN_HSRR0 /* Save HSRR0 */
- mfspr r12,SPRN_HSRR1 /* Save HSRR1 */
mr r10,r1 /* Save r1 */
ld r1,PACAEMERGSP(r13) /* Use emergency stack for realmode */
subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
@@ -2213,29 +2219,23 @@ INT_DEFINE_BEGIN(denorm_exception)
IVEC=0x1500
IHSRR=EXC_HV
IAREA=PACA_EXGEN
- IEARLY=2
+ IBRANCH_COMMON=0
IKVM_REAL=1
INT_DEFINE_END(denorm_exception)
EXC_REAL_BEGIN(denorm_exception, 0x1500, 0x100)
GEN_INT_ENTRY denorm_exception, GEN_REAL
#ifdef CONFIG_PPC_DENORMALISATION
- mfspr r10,SPRN_HSRR1
- andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
+ andis. r10,r12,(HSRR1_DENORM)@h /* denorm? */
bne+ denorm_assist
#endif
- mfspr r11,SPRN_HSRR0
- mfspr r12,SPRN_HSRR1
GEN_BRANCH_TO_COMMON denorm_exception, GEN_REAL
EXC_REAL_END(denorm_exception, 0x1500, 0x100)
#ifdef CONFIG_PPC_DENORMALISATION
EXC_VIRT_BEGIN(denorm_exception, 0x5500, 0x100)
GEN_INT_ENTRY denorm_exception, GEN_VIRT
- mfspr r10,SPRN_HSRR1
- andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
+ andis. r10,r12,(HSRR1_DENORM)@h /* denorm? */
bne+ denorm_assist
- mfspr r11,SPRN_HSRR0
- mfspr r12,SPRN_HSRR1
GEN_BRANCH_TO_COMMON denorm_exception, GEN_VIRT
EXC_VIRT_END(denorm_exception, 0x5500, 0x100)
#else
--
2.22.0
next prev parent reply other threads:[~2019-08-21 12:38 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-21 12:23 [PATCH 00/10] powerpc/64s/exception: initial reworking of Nicholas Piggin
2019-08-21 12:23 ` [PATCH 01/10] powerpc/64s/exception: Add ISIDE option Nicholas Piggin
2019-08-21 12:23 ` [PATCH 02/10] powerpc/64s/exception: move real->virt switch into the common handler Nicholas Piggin
2019-08-21 12:23 ` [PATCH 03/10] powerpc/64s/exception: move soft-mask test to common code Nicholas Piggin
2019-08-21 12:23 ` [PATCH 04/10] powerpc/64s/exception: move KVM " Nicholas Piggin
2019-08-21 12:23 ` Nicholas Piggin [this message]
2019-08-21 12:23 ` [PATCH 06/10] powerpc/64s/exception: remove the SPR saving patch code macros Nicholas Piggin
2019-08-21 12:23 ` [PATCH 07/10] powerpc/64s/exception: trim unused arguments from KVMTEST macro Nicholas Piggin
2019-08-21 12:23 ` [PATCH 08/10] powerpc/64s/exception: hdecrementer avoid touching the stack Nicholas Piggin
2019-08-21 12:23 ` [PATCH 09/10] powerpc/64s/exception: re-inline some handlers Nicholas Piggin
2019-08-21 12:23 ` [PATCH 10/10] powerpc/64s/exception: add more comments for interrupt handlers Nicholas Piggin
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