From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.1 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7AA6CC3A59F for ; Mon, 26 Aug 2019 16:52:49 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F091C20850 for ; Mon, 26 Aug 2019 16:52:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="cch9Lkn0" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F091C20850 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=linuxfoundation.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 46HJ322gx3zDqV4 for ; Tue, 27 Aug 2019 02:52:46 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linuxfoundation.org (client-ip=198.145.29.99; helo=mail.kernel.org; envelope-from=gregkh@linuxfoundation.org; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linuxfoundation.org Authentication-Results: lists.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="cch9Lkn0"; dkim-atps=neutral Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 46HJ0L1WrWzDqDr for ; Tue, 27 Aug 2019 02:50:26 +1000 (AEST) Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8115420850; Mon, 26 Aug 2019 16:50:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1566838224; bh=/JWCSqfQ4tLkHWbblH7A3gEnEXo0rRv/7eaJXLeukvg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=cch9Lkn060b3M5FmvtgVjdEu4sANIukuEaOsZW26nUjq2HQapBYq+Lq5Gz3ePW+yE R11lIuSM3MdvIDMwXgn1YKD38sgh5DhwgH/GD8aReh8qV2Jq3RFmW0FSslu6OJEGuv V1w9lMprNWO+JqHsnsGBcFfzYceoq0Fo4Qpnw5Jo= Date: Mon, 26 Aug 2019 18:50:21 +0200 From: Greg Kroah-Hartman To: Alastair D'Silva Subject: Re: [PATCH v2] powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB Message-ID: <20190826165021.GB9305@kroah.com> References: <20190821001929.4253-1-alastair@au1.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190821001929.4253-1-alastair@au1.ibm.com> User-Agent: Mutt/1.12.1 (2019-06-15) X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alastair@d-silva.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Paul Mackerras , Thomas Gleixner , linuxppc-dev@lists.ozlabs.org, Allison Randal Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Wed, Aug 21, 2019 at 10:19:27AM +1000, Alastair D'Silva wrote: > From: Alastair D'Silva > > The upstream commit: > 22e9c88d486a ("powerpc/64: reuse PPC32 static inline flush_dcache_range()") > has a similar effect, but since it is a rewrite of the assembler to C, is > too invasive for stable. This patch is a minimal fix to address the issue in > assembler. > > This patch applies cleanly to v5.2, v4.19 & v4.14. > > When calling flush_(inval_)dcache_range with a size >4GB, we were masking > off the upper 32 bits, so we would incorrectly flush a range smaller > than intended. > > This patch replaces the 32 bit shifts with 64 bit ones, so that > the full size is accounted for. > > Changelog: > v2 > - Add related upstream commit > > Signed-off-by: Alastair D'Silva > --- > arch/powerpc/kernel/misc_64.S | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S > index 1ad4089dd110..d4d096f80f4b 100644 > --- a/arch/powerpc/kernel/misc_64.S > +++ b/arch/powerpc/kernel/misc_64.S > @@ -130,7 +130,7 @@ _GLOBAL_TOC(flush_dcache_range) > subf r8,r6,r4 /* compute length */ > add r8,r8,r5 /* ensure we get enough */ > lwz r9,DCACHEL1LOGBLOCKSIZE(r10) /* Get log-2 of dcache block size */ > - srw. r8,r8,r9 /* compute line count */ > + srd. r8,r8,r9 /* compute line count */ > beqlr /* nothing to do? */ > mtctr r8 > 0: dcbst 0,r6 > @@ -148,7 +148,7 @@ _GLOBAL(flush_inval_dcache_range) > subf r8,r6,r4 /* compute length */ > add r8,r8,r5 /* ensure we get enough */ > lwz r9,DCACHEL1LOGBLOCKSIZE(r10)/* Get log-2 of dcache block size */ > - srw. r8,r8,r9 /* compute line count */ > + srd. r8,r8,r9 /* compute line count */ > beqlr /* nothing to do? */ > sync > isync I need an ack from the powerpc maintainer(s) before I can take this. thanks, greg k-h