From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1AE69C3A5A2 for ; Tue, 3 Sep 2019 16:07:36 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 598B722CF8 for ; Tue, 3 Sep 2019 16:07:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 598B722CF8 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.crashing.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 46NBg85XyPzDql2 for ; Wed, 4 Sep 2019 02:07:32 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=permerror (mailfrom) smtp.mailfrom=kernel.crashing.org (client-ip=63.228.1.57; helo=gate.crashing.org; envelope-from=segher@kernel.crashing.org; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=kernel.crashing.org Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 46NBbz5V5yzDqTY for ; Wed, 4 Sep 2019 02:04:46 +1000 (AEST) Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id x83G4HnT010981; Tue, 3 Sep 2019 11:04:17 -0500 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id x83G4F0O010980; Tue, 3 Sep 2019 11:04:15 -0500 X-Authentication-Warning: gate.crashing.org: segher set sender to segher@kernel.crashing.org using -f Date: Tue, 3 Sep 2019 11:04:15 -0500 From: Segher Boessenkool To: Christophe Leroy Subject: Re: [PATCH v2 3/6] powerpc: Convert flush_icache_range & friends to C Message-ID: <20190903160415.GA9749@gate.crashing.org> References: <20190903052407.16638-1-alastair@au1.ibm.com> <20190903052407.16638-4-alastair@au1.ibm.com> <20190903130430.GC31406@gate.crashing.org> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.4.2.3i X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alastair D'Silva , David Hildenbrand , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Nicholas Piggin , Mike Rapoport , Paul Mackerras , alastair@d-silva.org, Qian Cai , Thomas Gleixner , linuxppc-dev@lists.ozlabs.org, Andrew Morton , Allison Randal Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Tue, Sep 03, 2019 at 04:28:09PM +0200, Christophe Leroy wrote: > Le 03/09/2019 à 15:04, Segher Boessenkool a écrit : > >On Tue, Sep 03, 2019 at 03:23:57PM +1000, Alastair D'Silva wrote: > >>+ asm volatile( > >>+ " mtctr %2;" > >>+ " mtmsr %3;" > >>+ " isync;" > >>+ "0: dcbst 0, %0;" > >>+ " addi %0, %0, %4;" > >>+ " bdnz 0b;" > >>+ " sync;" > >>+ " mtctr %2;" > >>+ "1: icbi 0, %1;" > >>+ " addi %1, %1, %4;" > >>+ " bdnz 1b;" > >>+ " sync;" > >>+ " mtmsr %5;" > >>+ " isync;" > >>+ : "+r" (loop1), "+r" (loop2) > >>+ : "r" (nb), "r" (msr), "i" (bytes), "r" (msr0) > >>+ : "ctr", "memory"); > > > >This outputs as one huge assembler statement, all on one line. That's > >going to be fun to read or debug. > > Do you mean \n has to be added after the ; ? Something like that. There is no really satisfying way for doing huge inline asm, and maybe that is a good thing ;-) Often people write \n\t at the end of each line of inline asm. This works pretty well (but then there are labels, oh joy). > >loop1 and/or loop2 can be assigned the same register as msr0 or nb. They > >need to be made earlyclobbers. (msr is fine, all of its reads are before > >any writes to loop1 or loop2; and bytes is fine, it's not a register). > > Can you explicit please ? Doesn't '+r' means that they are input and > output at the same time ? That is what + means, yes -- that this output is an input as well. It is the same to write asm("mov %1,%0 ; mov %0,42" : "+r"(x), "=r"(y)); or to write asm("mov %1,%0 ; mov %0,42" : "=r"(x), "=r"(y) : "0"(x)); (So not "at the same time" as in "in the same machine instruction", but more loosely, as in "in the same inline asm statement"). > "to be made earlyclobbers", what does this means exactly ? How to do that ? You write &, like "+&r" in this case. It means the machine code writes to this register before it has consumed all asm inputs (remember, GCC does not understand (or even parse!) the assembler string). So just : "+&r" (loop1), "+&r" (loop2) will do. (Why are they separate though? It could just be one loop var). Segher