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From: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
To: maddy <maddy@linux.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 2/2] powerpc/pseries/svm: Disable BHRB/EBB/PMU access
Date: Thu, 9 Jan 2020 18:04:31 -0800	[thread overview]
Message-ID: <20200110020431.GA29470@us.ibm.com> (raw)
In-Reply-To: <10bfdea4-3237-b6d1-2ac0-034404a94dfc@linux.ibm.com>

maddy [maddy@linux.ibm.com] wrote:
> 
> >   __init_PMU:
> > +#ifdef CONFIG_PPC_SVM
> > +	/*
> > +	 * SVM's are restricted from accessing PMU, so skip.
> > +	 */
> > +	mfmsr   r5
> > +	rldicl  r5, r5, 64-MSR_S_LG, 62
> > +	cmpwi   r5,1
> > +	beq     skip1
> 
> I know all MMCR* are loaded with 0. But
> it is better if PEF code load the MMCR0
> with freeze bits on. I will send a separate
> patch to handle in the non-svm case.

Quick question: 
By PEF code you mean the Ultravisor and not here in
the SVM right? - bc SVMs cannot access PMU registers.
> 
> Rest looks good.
> Acked-by: Madhavan Srinivasan <maddy@linux.ibm.com>

Cool, Thanks,

Sukadev

      reply	other threads:[~2020-01-10  2:06 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-25  5:16 [PATCH 1/2] powerpc/pseries/svm: Use FW_FEATURE to detect SVM Sukadev Bhattiprolu
2019-12-25  5:16 ` [PATCH 2/2] powerpc/pseries/svm: Disable BHRB/EBB/PMU access Sukadev Bhattiprolu
2019-12-25 23:45   ` kbuild test robot
2019-12-27  5:29   ` Sukadev Bhattiprolu
2020-01-07  4:08     ` maddy
2020-01-10  2:04       ` Sukadev Bhattiprolu [this message]

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