From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5764C35242 for ; Mon, 17 Feb 2020 07:41:09 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9011D206D5 for ; Mon, 17 Feb 2020 07:41:09 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9011D206D5 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.crashing.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48LbWl42FDzDqhm for ; Mon, 17 Feb 2020 18:41:07 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; spf=permerror (SPF Permanent Error: Unknown mechanism found: ip:192.40.192.88/32) smtp.mailfrom=kernel.crashing.org (client-ip=63.228.1.57; helo=gate.crashing.org; envelope-from=segher@kernel.crashing.org; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=kernel.crashing.org Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 48LbRy2h55zDqfH for ; Mon, 17 Feb 2020 18:37:50 +1100 (AEDT) Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id 01H7bigW011077; Mon, 17 Feb 2020 01:37:44 -0600 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id 01H7bhPL011072; Mon, 17 Feb 2020 01:37:43 -0600 X-Authentication-Warning: gate.crashing.org: segher set sender to segher@kernel.crashing.org using -f Date: Mon, 17 Feb 2020 01:37:43 -0600 From: Segher Boessenkool To: Michael Neuling Subject: Re: [PATCH] KVM: PPC: Book3S HV: Treat unrecognized TM instructions as illegal Message-ID: <20200217073743.GT22482@gate.crashing.org> References: <20200213151532.12559-1-gromero@linux.ibm.com> <29b136e15c2f04f783b54ec98552d1a6009234db.camel@neuling.org> <20200217055712.GS22482@gate.crashing.org> <1752a0c735a455c5d3ca09209f5a52748c8f7116.camel@neuling.org> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1752a0c735a455c5d3ca09209f5a52748c8f7116.camel@neuling.org> User-Agent: Mutt/1.4.2.3i X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@lists.ozlabs.org, kvm-ppc@vger.kernel.org, Gustavo Romero Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Mon, Feb 17, 2020 at 05:23:07PM +1100, Michael Neuling wrote: > > > Hence, we should NOP this, not generate an illegal. > > > > It is not a reserved bit. > > > > The IMC entry for it matches op1=011111 op2=1////01110 presumably, which > > catches all TM instructions and nothing else (bits 0..5 and bits 21..30). > > That does not look at bit 31, the softpatch handler has to deal with this. > > > > Some TM insns have bit 31 as 1 and some have it as /. All instructions > > with a "." in the mnemonic have bit 31 is 1, all other have it reserved. > > The tables in appendices D, E, F show tend. and tsr. as having it > > reserved, which contradicts the individual instruction description (and > > does not make much sense). (Only tcheck has /, everything else has 1; > > everything else has a mnemonic with a dot, and does write CR0 always). > > Wow, interesting. > > P8 seems to be treating 31 as a reserved bit (with the table definition rather > than the individual instruction description). I'm inclined to match P8 even > though it's inconsistent with the dot mnemonic as you say. "The POWER8 core ignores the state of reserved bits in the instructions (denoted by “///” in the instruction definition) and executes the instruction normally. Software should set these bits to ‘0’ per the Power ISA." (p8 UM, 3.1.1.3; same in the p9 UM). Segher