From: Alistair Popple <alistair@popple.id.au>
To: linuxppc-dev@lists.ozlabs.org
Cc: mikey@neuling.org, oohall@gmail.com, npiggin@gmail.com,
Alistair Popple <alistair@popple.id.au>
Subject: [PATCH 2/2] powerpc: Enable Prefixed Instructions
Date: Thu, 23 Apr 2020 14:40:57 +1000 [thread overview]
Message-ID: <20200423044057.5517-2-alistair@popple.id.au> (raw)
In-Reply-To: <20200423044057.5517-1-alistair@popple.id.au>
Prefix instructions have their own FSCR bit which needs to enabled via
a CPU feature. The kernel will save the FSCR for problem state but it
needs to be enabled initially.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
---
arch/powerpc/kernel/dt_cpu_ftrs.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c b/arch/powerpc/kernel/dt_cpu_ftrs.c
index dede8f0b678f..e4caa4456869 100644
--- a/arch/powerpc/kernel/dt_cpu_ftrs.c
+++ b/arch/powerpc/kernel/dt_cpu_ftrs.c
@@ -627,6 +627,7 @@ static struct dt_cpu_feature_match __initdata
{"vector-binary128", feat_enable, 0},
{"vector-binary16", feat_enable, 0},
{"wait-v3", feat_enable, 0},
+ {"prefix-instructions", feat_enable, 0},
};
static bool __initdata using_dt_cpu_ftrs;
--
2.20.1
prev parent reply other threads:[~2020-04-23 4:44 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-23 4:40 [PATCH 1/2] powerpc: dt_cpu_ftrs: Set current thread fscr bits Alistair Popple
2020-04-23 4:40 ` Alistair Popple [this message]
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