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From: Jordan Niethe <jniethe5@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: alistair@popple.id.au, npiggin@gmail.com, bala24@linux.ibm.com,
	naveen.n.rao@linux.vnet.ibm.com,
	Jordan Niethe <jniethe5@gmail.com>,
	dja@axtens.net
Subject: [PATCH v8 10/30] powerpc: Introduce functions for instruction equality
Date: Wed,  6 May 2020 13:40:30 +1000	[thread overview]
Message-ID: <20200506034050.24806-11-jniethe5@gmail.com> (raw)
In-Reply-To: <20200506034050.24806-1-jniethe5@gmail.com>

In preparation for an instruction data type that can not be directly
used with the '==' operator use functions for checking equality.

Reviewed-by: Balamuruhan S <bala24@linux.ibm.com>
Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
---
v5: Remove ppc_inst_null()
v7: Fix compilation issue in expected_nop_sequence() when no
    CONFIG_MPROFILE_KERNEL
---
 arch/powerpc/include/asm/inst.h    |  5 +++++
 arch/powerpc/kernel/trace/ftrace.c | 15 ++++++++-------
 arch/powerpc/lib/code-patching.c   | 12 ++++++------
 arch/powerpc/xmon/xmon.c           |  4 ++--
 4 files changed, 21 insertions(+), 15 deletions(-)

diff --git a/arch/powerpc/include/asm/inst.h b/arch/powerpc/include/asm/inst.h
index 23fd57a86b03..0c5dc539160a 100644
--- a/arch/powerpc/include/asm/inst.h
+++ b/arch/powerpc/include/asm/inst.h
@@ -23,4 +23,9 @@ static inline u32 ppc_inst_swab(u32 x)
 	return ppc_inst(swab32(ppc_inst_val(x)));
 }
 
+static inline bool ppc_inst_equal(u32 x, u32 y)
+{
+	return x == y;
+}
+
 #endif /* _ASM_INST_H */
diff --git a/arch/powerpc/kernel/trace/ftrace.c b/arch/powerpc/kernel/trace/ftrace.c
index cc23c63f3769..cbb19af4a72a 100644
--- a/arch/powerpc/kernel/trace/ftrace.c
+++ b/arch/powerpc/kernel/trace/ftrace.c
@@ -72,7 +72,7 @@ ftrace_modify_code(unsigned long ip, unsigned int old, unsigned int new)
 		return -EFAULT;
 
 	/* Make sure it is what we expect it to be */
-	if (replaced != old) {
+	if (!ppc_inst_equal(replaced, old)) {
 		pr_err("%p: replaced (%#x) != old (%#x)",
 		(void *)ip, ppc_inst_val(replaced), ppc_inst_val(old));
 		return -EINVAL;
@@ -170,7 +170,8 @@ __ftrace_make_nop(struct module *mod,
 	}
 
 	/* We expect either a mflr r0, or a std r0, LRSAVE(r1) */
-	if (op != ppc_inst(PPC_INST_MFLR) && op != ppc_inst(PPC_INST_STD_LR)) {
+	if (!ppc_inst_equal(op, ppc_inst(PPC_INST_MFLR)) &&
+	    !ppc_inst_equal(op, ppc_inst(PPC_INST_STD_LR))) {
 		pr_err("Unexpected instruction %08x around bl _mcount\n",
 		       ppc_inst_val(op));
 		return -EINVAL;
@@ -201,7 +202,7 @@ __ftrace_make_nop(struct module *mod,
 		return -EFAULT;
 	}
 
-	if (op != ppc_inst(PPC_INST_LD_TOC)) {
+	if (!ppc_inst_equal(op,  ppc_inst(PPC_INST_LD_TOC))) {
 		pr_err("Expected %08x found %08x\n", PPC_INST_LD_TOC, ppc_inst_val(op));
 		return -EINVAL;
 	}
@@ -498,7 +499,7 @@ expected_nop_sequence(void *ip, unsigned int op0, unsigned int op1)
 	 * The load offset is different depending on the ABI. For simplicity
 	 * just mask it out when doing the compare.
 	 */
-	if (op0 != ppc_inst(0x48000008) ||
+	if (!ppc_inst_equal(op0, ppc_inst(0x48000008)) ||
 	    (ppc_inst_val(op1) & 0xffff0000) != 0xe8410000)
 		return 0;
 	return 1;
@@ -508,7 +509,7 @@ static int
 expected_nop_sequence(void *ip, unsigned int op0, unsigned int op1)
 {
 	/* look for patched "NOP" on ppc64 with -mprofile-kernel */
-	if (op0 != ppc_inst(PPC_INST_NOP))
+	if (!ppc_inst_equal(op0, ppc_inst(PPC_INST_NOP)))
 		return 0;
 	return 1;
 }
@@ -591,7 +592,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
 		return -EFAULT;
 
 	/* It should be pointing to a nop */
-	if (op != ppc_inst(PPC_INST_NOP)) {
+	if (!ppc_inst_equal(op,  ppc_inst(PPC_INST_NOP))) {
 		pr_err("Expected NOP but have %x\n", ppc_inst_val(op));
 		return -EINVAL;
 	}
@@ -648,7 +649,7 @@ static int __ftrace_make_call_kernel(struct dyn_ftrace *rec, unsigned long addr)
 		return -EFAULT;
 	}
 
-	if (op != ppc_inst(PPC_INST_NOP)) {
+	if (!ppc_inst_equal(op, ppc_inst(PPC_INST_NOP))) {
 		pr_err("Unexpected call sequence at %p: %x\n", ip, ppc_inst_val(op));
 		return -EINVAL;
 	}
diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
index f5c6dcbac44b..d298bb16936e 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -479,7 +479,7 @@ static void __init test_branch_iform(void)
 	/* Check flags are masked correctly */
 	err = create_branch(&instr, &instr, addr, 0xFFFFFFFC);
 	check(instr_is_branch_to_addr(&instr, addr));
-	check(instr == ppc_inst(0x48000000));
+	check(ppc_inst_equal(instr, ppc_inst(0x48000000)));
 }
 
 static void __init test_create_function_call(void)
@@ -564,7 +564,7 @@ static void __init test_branch_bform(void)
 	/* Check flags are masked correctly */
 	err = create_cond_branch(&instr, iptr, addr, 0xFFFFFFFC);
 	check(instr_is_branch_to_addr(&instr, addr));
-	check(instr == ppc_inst(0x43FF0000));
+	check(ppc_inst_equal(instr, ppc_inst(0x43FF0000)));
 }
 
 static void __init test_translate_branch(void)
@@ -598,7 +598,7 @@ static void __init test_translate_branch(void)
 	patch_instruction(q, instr);
 	check(instr_is_branch_to_addr(p, addr));
 	check(instr_is_branch_to_addr(q, addr));
-	check(*q == ppc_inst(0x4a000000));
+	check(ppc_inst_equal(*q, ppc_inst(0x4a000000)));
 
 	/* Maximum positive case, move x to x - 32 MB + 4 */
 	p = buf + 0x2000000;
@@ -609,7 +609,7 @@ static void __init test_translate_branch(void)
 	patch_instruction(q, instr);
 	check(instr_is_branch_to_addr(p, addr));
 	check(instr_is_branch_to_addr(q, addr));
-	check(*q == ppc_inst(0x49fffffc));
+	check(ppc_inst_equal(*q, ppc_inst(0x49fffffc)));
 
 	/* Jump to x + 16 MB moved to x + 20 MB */
 	p = buf;
@@ -655,7 +655,7 @@ static void __init test_translate_branch(void)
 	patch_instruction(q, instr);
 	check(instr_is_branch_to_addr(p, addr));
 	check(instr_is_branch_to_addr(q, addr));
-	check(*q == ppc_inst(0x43ff8000));
+	check(ppc_inst_equal(*q, ppc_inst(0x43ff8000)));
 
 	/* Maximum positive case, move x to x - 32 KB + 4 */
 	p = buf + 0x8000;
@@ -667,7 +667,7 @@ static void __init test_translate_branch(void)
 	patch_instruction(q, instr);
 	check(instr_is_branch_to_addr(p, addr));
 	check(instr_is_branch_to_addr(q, addr));
-	check(*q == ppc_inst(0x43ff7ffc));
+	check(ppc_inst_equal(*q, ppc_inst(0x43ff7ffc)));
 
 	/* Jump to x + 12 KB moved to x + 20 KB */
 	p = buf;
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 99ba585a769b..2e8ed8cdcf28 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -947,7 +947,7 @@ static void remove_bpts(void)
 		if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP)
 			continue;
 		if (mread(bp->address, &instr, 4) == 4
-		    && instr == ppc_inst(bpinstr)
+		    && ppc_inst_equal(instr, ppc_inst(bpinstr))
 		    && patch_instruction(
 			(unsigned int *)bp->address, bp->instr[0]) != 0)
 			printf("Couldn't remove breakpoint at %lx\n",
@@ -2862,7 +2862,7 @@ generic_inst_dump(unsigned long adr, long count, int praddr,
 			break;
 		}
 		inst = ppc_inst(GETWORD(val));
-		if (adr > first_adr && inst == last_inst) {
+		if (adr > first_adr && ppc_inst_equal(inst, last_inst)) {
 			if (!dotted) {
 				printf(" ...\n");
 				dotted = 1;
-- 
2.17.1


  parent reply	other threads:[~2020-05-06  4:03 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-06  3:40 [PATCH v8 00/30] Initial Prefixed Instruction support Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 01/30] powerpc/xmon: Remove store_inst() for patch_instruction() Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 02/30] powerpc/xmon: Move breakpoint instructions to own array Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 03/30] powerpc/xmon: Move breakpoints to text section Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 04/30] powerpc/xmon: Use bitwise calculations in_breakpoint_table() Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 05/30] powerpc: Change calling convention for create_branch() et. al Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 06/30] powerpc: Use a macro for creating instructions from u32s Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 07/30] powerpc: Use an accessor for instructions Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 08/30] powerpc: Use a function for getting the instruction op code Jordan Niethe
2020-05-15  7:48   ` Jordan Niethe
2020-05-16 11:08     ` Michael Ellerman
2020-05-17  7:41       ` Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 09/30] powerpc: Use a function for byte swapping instructions Jordan Niethe
2020-05-06  3:40 ` Jordan Niethe [this message]
2020-05-06  3:40 ` [PATCH v8 11/30] powerpc: Use a datatype for instructions Jordan Niethe
2020-05-08  1:51   ` Jordan Niethe
2020-05-08  7:17     ` Christophe Leroy
2020-05-11  1:19       ` Jordan Niethe
2020-05-08  2:15   ` Jordan Niethe
2020-05-17 10:48   ` Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 12/30] powerpc: Use a function for reading instructions Jordan Niethe
2020-05-16 18:39   ` Christophe Leroy
2020-05-17 10:44     ` Jordan Niethe
2020-05-19  4:05       ` Michael Ellerman
2020-05-19  5:03         ` Christophe Leroy
2020-05-20  4:16           ` Michael Ellerman
2020-05-06  3:40 ` [PATCH v8 13/30] powerpc: Add a probe_user_read_inst() function Jordan Niethe
2020-05-13 12:52   ` Michael Ellerman
2020-05-13 23:51     ` Jordan Niethe
2020-05-14  5:46   ` Christophe Leroy
2020-05-15  3:46     ` Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 14/30] powerpc: Add a probe_kernel_read_inst() function Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 15/30] powerpc/kprobes: Use patch_instruction() Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 16/30] powerpc: Define and use __get_user_instr{, inatomic}() Jordan Niethe
2020-05-13 14:18   ` Michael Ellerman
2020-05-13 23:54     ` Jordan Niethe
2020-05-14  1:43       ` Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 17/30] powerpc: Introduce a function for reporting instruction length Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 18/30] powerpc/xmon: Use a function for reading instructions Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 19/30] powerpc/xmon: Move insertion of breakpoint for xol'ing Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 20/30] powerpc: Make test_translate_branch() independent of instruction length Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 21/30] powerpc: Enable Prefixed Instructions Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 22/30] powerpc: Define new SRR1 bits for a future ISA version Jordan Niethe
2020-05-08  2:26   ` Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 23/30] powerpc: Add prefixed instructions to instruction data type Jordan Niethe
2020-05-14  1:40   ` Jordan Niethe
2020-05-14  6:11   ` Christophe Leroy
2020-05-14 12:06     ` Alistair Popple
2020-05-14 12:29       ` Jordan Niethe
2020-05-14 12:57       ` Christophe Leroy
2020-05-14 12:28     ` Jordan Niethe
2020-05-15  1:33     ` Michael Ellerman
2020-05-15  7:52       ` Jordan Niethe
2020-05-16 11:54   ` [PATCH v8 22.5/30] powerpc/optprobes: Add register argument to patch_imm64_load_insns() Michael Ellerman
2020-06-09  5:51     ` Michael Ellerman
2020-05-06  3:40 ` [PATCH v8 24/30] powerpc: Test prefixed code patching Jordan Niethe
2020-05-15  7:54   ` Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 25/30] powerpc: Test prefixed instructions in feature fixups Jordan Niethe
2020-05-15  7:57   ` Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 26/30] powerpc/xmon: Don't allow breakpoints on suffixes Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 27/30] powerpc/kprobes: " Jordan Niethe
2021-05-18 18:43   ` Christophe Leroy
2021-05-18 19:52     ` Gabriel Paubert
2021-05-19  8:11     ` Naveen N. Rao
2021-05-20  3:45       ` Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 28/30] powerpc: Support prefixed instructions in alignment handler Jordan Niethe
2020-05-14  6:14   ` Christophe Leroy
2020-05-14 12:15     ` Alistair Popple
2020-05-14 12:59       ` Christophe Leroy
2020-05-06  3:40 ` [PATCH v8 29/30] powerpc sstep: Add support for prefixed load/stores Jordan Niethe
2020-05-14  6:15   ` Christophe Leroy
2020-05-14 12:19     ` Alistair Popple
2020-05-14 13:00       ` Christophe Leroy
2020-05-15  7:59   ` Jordan Niethe
2020-05-06  3:40 ` [PATCH v8 30/30] powerpc sstep: Add support for prefixed fixed-point arithmetic Jordan Niethe
2020-05-14  6:15   ` Christophe Leroy
2020-05-15  8:02   ` Jordan Niethe
2020-05-14  5:31 ` [PATCH v8 00/30] Initial Prefixed Instruction support Christophe Leroy
2020-05-14 10:33   ` Jordan Niethe
2020-05-20 10:59 ` Michael Ellerman

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